NEORV32 Software Framework Documentation
The NEORV32 RISC-V Processor
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config.h
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1// ================================================================================ //
2// The NEORV32 RISC-V Processor - https://github.com/stnolting/neorv32 //
3// Copyright (c) NEORV32 contributors. //
4// Copyright (c) 2020 - 2025 Stephan Nolting. All rights reserved. //
5// Licensed under the BSD-3-Clause license, see LICENSE for details. //
6// SPDX-License-Identifier: BSD-3-Clause //
7// ================================================================================ //
8
14#ifndef CONFIG_H
15#define CONFIG_H
16
17/**********************************************************************
18 * Processor memory layout
19 **********************************************************************/
20
21// Main memory base address for executable (32-bit, has to be 4-byte-aligned)
22#ifndef EXE_BASE_ADDR
23#define EXE_BASE_ADDR 0x00000000
24#endif
25
26/**********************************************************************
27 * Serial console
28 **********************************************************************/
29
30// Enable UART0 (0,1)
31#ifndef UART_EN
32#define UART_EN 1
33#endif
34
35// UART0 baud rate
36#ifndef UART_BAUD
37#define UART_BAUD 19200
38#endif
39
40/**********************************************************************
41 * Status LED (high-active)
42 **********************************************************************/
43
44// Enable status LED (0,1)
45#ifndef STATUS_LED_EN
46#define STATUS_LED_EN 1
47#endif
48
49// GPIO output pin for status LED (0..31)
50#ifndef STATUS_LED_PIN
51#define STATUS_LED_PIN 0
52#endif
53
54/**********************************************************************
55 * Auto-boot
56 **********************************************************************/
57
58// Enable auto-boot (0,1)
59#ifndef AUTO_BOOT_EN
60#define AUTO_BOOT_EN 1
61#endif
62
63// Time until the auto-boot sequence starts (in seconds)
64#ifndef AUTO_BOOT_TIMEOUT
65#define AUTO_BOOT_TIMEOUT 10
66#endif
67
68/**********************************************************************
69 * TWI flash
70 **********************************************************************/
71
72// Enable TWI flash options (0,1)
73#ifndef TWI_FLASH_EN
74#define TWI_FLASH_EN 0
75#endif
76
77// Enable TWI flash programming
78#ifndef TWI_FLASH_PROG_EN
79#define TWI_FLASH_PROG_EN 1
80#endif
81
82// TWI flash clock prescaler (#NEORV32_CLOCK_PRSC_enum)
83#ifndef TWI_FLASH_CLK_PRSC
84#define TWI_FLASH_CLK_PRSC CLK_PRSC_1024
85#endif
86
87// TWI flash clock divider (0..15)
88#ifndef TWI_FLASH_CLK_DIV
89#define TWI_FLASH_CLK_DIV 0
90#endif
91
92// TWI flash device ID (8-bit; R/W-bit cleared)
93#ifndef TWI_FLASH_ID
94#define TWI_FLASH_ID 0xA0
95#endif
96
97// TWI flash base address (32-bit, has to be 4-byte-aligned)
98#ifndef TWI_FLASH_BASE_ADDR
99#define TWI_FLASH_BASE_ADDR 0x00000000
100#endif
101
102// TWI flash address bytes (1..4)
103#ifndef TWI_FLASH_ADDR_BYTES
104#define TWI_FLASH_ADDR_BYTES 2
105#endif
106
107/**********************************************************************
108 * SPI flash
109 **********************************************************************/
110
111// Enable SPI flash options (0,1)
112#ifndef SPI_FLASH_EN
113#define SPI_FLASH_EN 1
114#endif
115
116// Enable SPI flash programming
117#ifndef SPI_FLASH_PROG_EN
118#define SPI_FLASH_PROG_EN 1
119#endif
120
121// SPI flash chip select (0..7)
122#ifndef SPI_FLASH_CS
123#define SPI_FLASH_CS 0
124#endif
125
126// SPI flash clock prescaler (#NEORV32_CLOCK_PRSC_enum)
127#ifndef SPI_FLASH_CLK_PRSC
128#define SPI_FLASH_CLK_PRSC CLK_PRSC_64
129#endif
130
131// SPI flash clock divider (0..15)
132#ifndef SPI_FLASH_CLK_DIV
133#define SPI_FLASH_CLK_DIV 0
134#endif
135
136// SPI flash base address (should be aligned to the sector size)
137#ifndef SPI_FLASH_BASE_ADDR
138#define SPI_FLASH_BASE_ADDR 0x00400000
139#endif
140
141// SPI flash address bytes (1..4)
142#ifndef SPI_FLASH_ADDR_BYTES
143#define SPI_FLASH_ADDR_BYTES 3
144#endif
145
146// SPI flash sector size in bytes
147#ifndef SPI_FLASH_SECTOR_SIZE
148#define SPI_FLASH_SECTOR_SIZE (64*1024)
149#endif
150
151/**********************************************************************
152 * SD card (via SPI; FAT32 file system)
153 **********************************************************************/
154
155// Enable SD card options (0,1)
156#ifndef SPI_SDCARD_EN
157#define SPI_SDCARD_EN 0
158#endif
159
160// SD card SPI chip select (0..7)
161#ifndef SPI_SDCARD_CS
162#define SPI_SDCARD_CS 1
163#endif
164
165// SD card SPI clock prescaler (#NEORV32_CLOCK_PRSC_enum)
166#ifndef SPI_SDCARD_CLK_PRSC
167#define SPI_SDCARD_CLK_PRSC CLK_PRSC_64
168#endif
169
170// SD card SPI clock divider (0..15)
171#ifndef SPI_SDCARD_CLK_DIV
172#define SPI_SDCARD_CLK_DIV 0
173#endif
174
175// Binary executable file name (must be located in root directory, 8.3-DOS-names only)
176#ifndef SPI_SDCARD_FILE
177#define SPI_SDCARD_FILE "boot.bin"
178#endif
179
180/**********************************************************************
181 * Console text (for branding)
182 **********************************************************************/
183
184// Intro text
185#ifndef THEME_INTRO
186#define THEME_INTRO "NEORV32 Bootloader"
187#endif
188
189// Name of executable that is shown in the console menu
190#ifndef THEME_EXE
191#define THEME_EXE "neorv32_exe.bin"
192#endif
193
194#endif // CONFIG_H