NEORV32 - Software Framework Documentation
freertos_risc_v_chip_specific_extensions.h
1/*
2 * FreeRTOS Kernel V10.3.1
3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a copy of
6 * this software and associated documentation files (the "Software"), to deal in
7 * the Software without restriction, including without limitation the rights to
8 * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
9 * the Software, and to permit persons to whom the Software is furnished to do so,
10 * subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be included in all
13 * copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
17 * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
18 * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
19 * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
20 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * http://www.FreeRTOS.org
23 * http://aws.amazon.com/freertos
24 *
25 * 1 tab == 4 spaces!
26 */
27
28/*
29 * The FreeRTOS kernel's RISC-V port is split between the the code that is
30 * common across all currently supported RISC-V chips (implementations of the
31 * RISC-V ISA), and code that tailors the port to a specific RISC-V chip:
32 *
33 * + FreeRTOS\Source\portable\GCC\RISC-V-RV32\portASM.S contains the code that
34 * is common to all currently supported RISC-V chips. There is only one
35 * portASM.S file because the same file is built for all RISC-V target chips.
36 *
37 * + Header files called freertos_risc_v_chip_specific_extensions.h contain the
38 * code that tailors the FreeRTOS kernel's RISC-V port to a specific RISC-V
39 * chip. There are multiple freertos_risc_v_chip_specific_extensions.h files
40 * as there are multiple RISC-V chip implementations.
41 *
42 * !!!NOTE!!!
43 * TAKE CARE TO INCLUDE THE CORRECT freertos_risc_v_chip_specific_extensions.h
44 * HEADER FILE FOR THE CHIP IN USE. This is done using the assembler's (not the
45 * compiler's!) include path. For example, if the chip in use includes a core
46 * local interrupter (CLINT) and does not include any chip specific register
47 * extensions then add the path below to the assembler's include path:
48 * FreeRTOS\Source\portable\GCC\RISC-V-RV32\chip_specific_extensions\RV32I_CLINT_no_extensions
49 *
50 */
51
52/*
53 * NEORV32 chip specific extensions
54 */
55
56
57#ifndef __FREERTOS_RISC_V_EXTENSIONS_H__
58#define __FREERTOS_RISC_V_EXTENSIONS_H__
59
60#define portasmHAS_SIFIVE_CLINT 0
61#define portasmHAS_MTIME 1
62#define portasmADDITIONAL_CONTEXT_SIZE 0 /* Must be even number on 32-bit cores. */
63
64.macro portasmSAVE_ADDITIONAL_REGISTERS
65 /* No additional registers to save, so this macro does nothing. */
66 .endm
67
68.macro portasmRESTORE_ADDITIONAL_REGISTERS
69 /* No additional registers to restore, so this macro does nothing. */
70 .endm
71
72#endif /* __FREERTOS_RISC_V_EXTENSIONS_H__ */