NEORV32 - Software Framework Documentation
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Functions
neorv32_b_extension_intrinsics.h File Reference

"Intrinsic" library for the NEORV32 bit manipulation B extension. Also provides emulation functions for all intrinsics (functionality re-built in pure software). More...

Go to the source code of this file.

Functions

uint32_t riscv_intrinsic_clz (uint32_t rs1)
 
uint32_t riscv_intrinsic_ctz (uint32_t rs1)
 
uint32_t riscv_intrinsic_cpop (uint32_t rs1)
 
uint32_t riscv_intrinsic_sextb (uint32_t rs1)
 
uint32_t riscv_intrinsic_sexth (uint32_t rs1)
 
uint32_t riscv_intrinsic_zexth (uint32_t rs1)
 
uint32_t riscv_intrinsic_min (uint32_t rs1, uint32_t rs2)
 
uint32_t riscv_intrinsic_minu (uint32_t rs1, uint32_t rs2)
 
uint32_t riscv_intrinsic_max (uint32_t rs1, uint32_t rs2)
 
uint32_t riscv_intrinsic_maxu (uint32_t rs1, uint32_t rs2)
 
uint32_t riscv_intrinsic_andn (uint32_t rs1, uint32_t rs2)
 
uint32_t riscv_intrinsic_orn (uint32_t rs1, uint32_t rs2)
 
uint32_t riscv_intrinsic_xnor (uint32_t rs1, uint32_t rs2)
 
uint32_t riscv_intrinsic_rol (uint32_t rs1, uint32_t rs2)
 
uint32_t riscv_intrinsic_ror (uint32_t rs1, uint32_t rs2)
 
uint32_t riscv_intrinsic_rori20 (uint32_t rs1)
 
uint32_t riscv_intrinsic_orcb (uint32_t rs1)
 
uint32_t riscv_intrinsic_rev8 (uint32_t rs1)
 
uint32_t riscv_intrinsic_sh1add (uint32_t rs1, uint32_t rs2)
 
uint32_t riscv_intrinsic_sh2add (uint32_t rs1, uint32_t rs2)
 
uint32_t riscv_intrinsic_sh3add (uint32_t rs1, uint32_t rs2)
 
uint32_t riscv_intrinsic_bclr (uint32_t rs1, uint32_t rs2)
 
uint32_t riscv_intrinsic_bclri20 (uint32_t rs1)
 
uint32_t riscv_intrinsic_bext (uint32_t rs1, uint32_t rs2)
 
uint32_t riscv_intrinsic_bexti20 (uint32_t rs1)
 
uint32_t riscv_intrinsic_binv (uint32_t rs1, uint32_t rs2)
 
uint32_t riscv_intrinsic_binvi20 (uint32_t rs1)
 
uint32_t riscv_intrinsic_bset (uint32_t rs1, uint32_t rs2)
 
uint32_t riscv_intrinsic_bseti20 (uint32_t rs1)
 
uint32_t riscv_intrinsic_clmul (uint32_t rs1, uint32_t rs2)
 
uint32_t riscv_intrinsic_clmulh (uint32_t rs1, uint32_t rs2)
 
uint32_t riscv_intrinsic_clmulr (uint32_t rs1, uint32_t rs2)
 
uint32_t riscv_emulate_clz (uint32_t rs1)
 
uint32_t riscv_emulate_ctz (uint32_t rs1)
 
uint32_t riscv_emulate_cpop (uint32_t rs1)
 
uint32_t riscv_emulate_sextb (uint32_t rs1)
 
uint32_t riscv_emulate_sexth (uint32_t rs1)
 
uint32_t riscv_emulate_zexth (uint32_t rs1)
 
uint32_t riscv_emulate_min (uint32_t rs1, uint32_t rs2)
 
uint32_t riscv_emulate_minu (uint32_t rs1, uint32_t rs2)
 
uint32_t riscv_emulate_max (uint32_t rs1, uint32_t rs2)
 
uint32_t riscv_emulate_maxu (uint32_t rs1, uint32_t rs2)
 
uint32_t riscv_emulate_andn (uint32_t rs1, uint32_t rs2)
 
uint32_t riscv_emulate_orn (uint32_t rs1, uint32_t rs2)
 
uint32_t riscv_emulate_xnor (uint32_t rs1, uint32_t rs2)
 
uint32_t riscv_emulate_rol (uint32_t rs1, uint32_t rs2)
 
uint32_t riscv_emulate_ror (uint32_t rs1, uint32_t rs2)
 
uint32_t riscv_emulate_rev8 (uint32_t rs1)
 
uint32_t riscv_emulate_orcb (uint32_t rs1)
 
uint32_t riscv_emulate_sh1add (uint32_t rs1, uint32_t rs2)
 
uint32_t riscv_emulate_sh2add (uint32_t rs1, uint32_t rs2)
 
uint32_t riscv_emulate_sh3add (uint32_t rs1, uint32_t rs2)
 
uint32_t riscv_emulate_bclr (uint32_t rs1, uint32_t rs2)
 
uint32_t riscv_emulate_bext (uint32_t rs1, uint32_t rs2)
 
uint32_t riscv_emulate_binv (uint32_t rs1, uint32_t rs2)
 
uint32_t riscv_emulate_bset (uint32_t rs1, uint32_t rs2)
 
uint32_t riscv_emulate_clmul (uint32_t rs1, uint32_t rs2)
 
uint32_t riscv_emulate_clmulh (uint32_t rs1, uint32_t rs2)
 
uint32_t riscv_emulate_clmulr (uint32_t rs1, uint32_t rs2)
 

Detailed Description

"Intrinsic" library for the NEORV32 bit manipulation B extension. Also provides emulation functions for all intrinsics (functionality re-built in pure software).

Author
Stephan Nolting
Warning
This library is just a temporary fall-back until the B extension is supported by the upstream RISC-V GCC port.

Function Documentation

◆ riscv_emulate_andn()

uint32_t riscv_emulate_andn ( uint32_t  rs1,
uint32_t  rs2 
)

Intrinsic: Bit manipulation ANDN (logical and-negate) [emulation]

Parameters
[in]rs1Source operand 1.
[in]rs2Source operand 1.
Returns
Operand 1 AND NOT operand 2.

◆ riscv_emulate_bclr()

uint32_t riscv_emulate_bclr ( uint32_t  rs1,
uint32_t  rs2 
)

Intrinsic: Bit manipulation BCLR (bit-clear) [emulation]

Parameters
[in]rs1Source operand 1.
[in]rs2Source operand 1.
Returns
Operand 1 with cleared bit indexed by operand_2(4:0).

◆ riscv_emulate_bext()

uint32_t riscv_emulate_bext ( uint32_t  rs1,
uint32_t  rs2 
)

Intrinsic: Bit manipulation BEXT (bit-extract) [emulation]

Parameters
[in]rs1Source operand 1.
[in]rs2Source operand 1.
Returns
Extract bit from operand 1 indexed by operand_2(4:0).

◆ riscv_emulate_binv()

uint32_t riscv_emulate_binv ( uint32_t  rs1,
uint32_t  rs2 
)

Intrinsic: Bit manipulation BINV (bit-invert) [emulation]

Parameters
[in]rs1Source operand 1.
[in]rs2Source operand 1.
Returns
Invert bit from operand 1 indexed by operand_2(4:0).

◆ riscv_emulate_bset()

uint32_t riscv_emulate_bset ( uint32_t  rs1,
uint32_t  rs2 
)

Intrinsic: Bit manipulation BSET (bit-set) [emulation]

Parameters
[in]rs1Source operand 1.
[in]rs2Source operand 1.
Returns
Set bit from operand 1 indexed by operand_2(4:0).

◆ riscv_emulate_clmul()

uint32_t riscv_emulate_clmul ( uint32_t  rs1,
uint32_t  rs2 
)

Intrinsic: Bit manipulation CLMUL (carry-less multiply, low-part) [emulation]

Parameters
[in]rs1Source operand 1.
[in]rs2Source operand 1.
Returns
Carry-less multiplication product, low part

◆ riscv_emulate_clmulh()

uint32_t riscv_emulate_clmulh ( uint32_t  rs1,
uint32_t  rs2 
)

Intrinsic: Bit manipulation CLMULH (carry-less multiply, high-part) [emulation]

Parameters
[in]rs1Source operand 1.
[in]rs2Source operand 1.
Returns
Carry-less multiplication product, high part

◆ riscv_emulate_clmulr()

uint32_t riscv_emulate_clmulr ( uint32_t  rs1,
uint32_t  rs2 
)

Intrinsic: Bit manipulation CLMUR (carry-less multiply, reversed) [emulation]

Parameters
[in]rs1Source operand 1.
[in]rs2Source operand 1.
Returns
Carry-less multiplication product, low part, reversed

◆ riscv_emulate_clz()

uint32_t riscv_emulate_clz ( uint32_t  rs1)

Intrinsic: Bit manipulation CLZ (count leading zeros) [emulation]

Parameters
[in]rs1Source operand 1.
Returns
Number of leading zeros in source operand.

◆ riscv_emulate_cpop()

uint32_t riscv_emulate_cpop ( uint32_t  rs1)

Intrinsic: Bit manipulation CPOP (population count) [emulation]

Parameters
[in]rs1Source operand 1.
Returns
Number of set bits in source operand.

◆ riscv_emulate_ctz()

uint32_t riscv_emulate_ctz ( uint32_t  rs1)

Intrinsic: Bit manipulation CTZ (count trailing zeros) [emulation]

Parameters
[in]rs1Source operand 1.
Returns
Number of trailing zeros in source operand.

◆ riscv_emulate_max()

uint32_t riscv_emulate_max ( uint32_t  rs1,
uint32_t  rs2 
)

Intrinsic: Bit manipulation MAX (select signed maximum) [emulation]

Parameters
[in]rs1Source operand 1.
[in]rs2Source operand 1.
Returns
Signed maximum.

◆ riscv_emulate_maxu()

uint32_t riscv_emulate_maxu ( uint32_t  rs1,
uint32_t  rs2 
)

Intrinsic: Bit manipulation MAXU (select unsigned maximum) [emulation]

Parameters
[in]rs1Source operand 1.
[in]rs2Source operand 1.
Returns
Unsigned maximum.

◆ riscv_emulate_min()

uint32_t riscv_emulate_min ( uint32_t  rs1,
uint32_t  rs2 
)

Intrinsic: Bit manipulation MIN (select signed minimum) [emulation]

Parameters
[in]rs1Source operand 1.
[in]rs2Source operand 1.
Returns
Signed minimum.

◆ riscv_emulate_minu()

uint32_t riscv_emulate_minu ( uint32_t  rs1,
uint32_t  rs2 
)

Intrinsic: Bit manipulation MINU (select unsigned minimum) [emulation]

Parameters
[in]rs1Source operand 1.
[in]rs2Source operand 1.
Returns
Unsigned minimum.

◆ riscv_emulate_orcb()

uint32_t riscv_emulate_orcb ( uint32_t  rs1)

Intrinsic: Bit manipulation ORCB (or-combine bytes) [emulation]

Parameters
[in]rs1Source operand 1.
Returns
OR-combined bytes of operand 1.

◆ riscv_emulate_orn()

uint32_t riscv_emulate_orn ( uint32_t  rs1,
uint32_t  rs2 
)

Intrinsic: Bit manipulation ORN (logical or-negate) [emulation]

Parameters
[in]rs1Source operand 1.
[in]rs2Source operand 1.
Returns
Operand 1 OR NOT operand 2.

◆ riscv_emulate_rev8()

uint32_t riscv_emulate_rev8 ( uint32_t  rs1)

Intrinsic: Bit manipulation REV8 (byte swap) [emulation]

Parameters
[in]rs1Source operand 1.
Returns
Operand 1 byte swapped.

◆ riscv_emulate_rol()

uint32_t riscv_emulate_rol ( uint32_t  rs1,
uint32_t  rs2 
)

Intrinsic: Bit manipulation ROL (rotate-left) [emulation]

Parameters
[in]rs1Source operand 1.
[in]rs2Source operand 1.
Returns
Operand 1 rotated left by operand_2(4:0) positions.

◆ riscv_emulate_ror()

uint32_t riscv_emulate_ror ( uint32_t  rs1,
uint32_t  rs2 
)

Intrinsic: Bit manipulation ROR (rotate-right) [emulation]

Parameters
[in]rs1Source operand 1.
[in]rs2Source operand 1.
Returns
Operand 1 rotated right by operand_2(4:0) positions.

◆ riscv_emulate_sextb()

uint32_t riscv_emulate_sextb ( uint32_t  rs1)

Intrinsic: Bit manipulation SEXT.B (sign-extend byte) [emulation]

Parameters
[in]rs1Source operand 1.
Returns
Sign-extended byte (operand(7:0)).

◆ riscv_emulate_sexth()

uint32_t riscv_emulate_sexth ( uint32_t  rs1)

Intrinsic: Bit manipulation SEXT.H (sign-extend half-word) [emulation]

Parameters
[in]rs1Source operand 1.
Returns
Sign-extended half-word (operand(15:0)).

◆ riscv_emulate_sh1add()

uint32_t riscv_emulate_sh1add ( uint32_t  rs1,
uint32_t  rs2 
)

Intrinsic: Address generation instructions SH1ADD (add with logical-1-shift) [emulation]

Parameters
[in]rs1Source operand 1.
[in]rs2Source operand 1.
Returns
Operand 2 + (Operand 1 << 1)

◆ riscv_emulate_sh2add()

uint32_t riscv_emulate_sh2add ( uint32_t  rs1,
uint32_t  rs2 
)

Intrinsic: Address generation instructions SH2ADD (add with logical-2-shift) [emulation]

Parameters
[in]rs1Source operand 1.
[in]rs2Source operand 1.
Returns
Operand 2 + (Operand 1 << 2)

◆ riscv_emulate_sh3add()

uint32_t riscv_emulate_sh3add ( uint32_t  rs1,
uint32_t  rs2 
)

Intrinsic: Address generation instructions SH3ADD (add with logical-3-shift) [emulation]

Parameters
[in]rs1Source operand 1.
[in]rs2Source operand 1.
Returns
Operand 2 + (Operand 1 << 3)

◆ riscv_emulate_xnor()

uint32_t riscv_emulate_xnor ( uint32_t  rs1,
uint32_t  rs2 
)

Intrinsic: Bit manipulation XNOR (logical xor-negate) [emulation]

Parameters
[in]rs1Source operand 1.
[in]rs2Source operand 1.
Returns
Operand 1 XOR NOT operand 2.

◆ riscv_emulate_zexth()

uint32_t riscv_emulate_zexth ( uint32_t  rs1)

Intrinsic: Bit manipulation ZEXT.H (zero-extend half-word) [emulation]

Parameters
[in]rs1Source operand 1.
Returns
Zero-extended half-word (operand(15:0)).

◆ riscv_intrinsic_andn()

uint32_t riscv_intrinsic_andn ( uint32_t  rs1,
uint32_t  rs2 
)
inline

Intrinsic: Bit manipulation ANDN (logical and-negate) [B.Zbb]

Parameters
[in]rs1Source operand 1.
[in]rs2Source operand 2.
Returns
Operand 1 AND NOT operand 2.

◆ riscv_intrinsic_bclr()

uint32_t riscv_intrinsic_bclr ( uint32_t  rs1,
uint32_t  rs2 
)
inline

Intrinsic: Bit manipulation BCLR (bit-clear) [B.Zbs]

Parameters
[in]rs1Source operand 1.
[in]rs2Source operand 2.
Returns
Operand 1 with bit cleared indexed by operand_2(4:0).

◆ riscv_intrinsic_bclri20()

uint32_t riscv_intrinsic_bclri20 ( uint32_t  rs1)
inline

Intrinsic: Bit manipulation BCLRI (bit-clear) by 20 positions. [B.Zbs]

Warning
Fixed shift amount (20) for now.
Parameters
[in]rs1Source operand 1.
Returns
Operand 1 with bit cleared at position 20.

◆ riscv_intrinsic_bext()

uint32_t riscv_intrinsic_bext ( uint32_t  rs1,
uint32_t  rs2 
)
inline

Intrinsic: Bit manipulation BEXT (bit-extract) [B.Zbs]

Parameters
[in]rs1Source operand 1.
[in]rs2Source operand 2.
Returns
Extract bit from Operand 1 indexed by operand_2(4:0).

◆ riscv_intrinsic_bexti20()

uint32_t riscv_intrinsic_bexti20 ( uint32_t  rs1)
inline

Intrinsic: Bit manipulation BEXTI (bit-extract) by 20 positions. [B.Zbs]

Warning
Fixed shift amount (20) for now.
Parameters
[in]rs1Source operand 1.
Returns
Extract bit from Operand 1 at position 20.

◆ riscv_intrinsic_binv()

uint32_t riscv_intrinsic_binv ( uint32_t  rs1,
uint32_t  rs2 
)
inline

Intrinsic: Bit manipulation BINV (bit-invert) [B.Zbs]

Parameters
[in]rs1Source operand 1.
[in]rs2Source operand 2.
Returns
Invert bit from Operand 1 indexed by operand_2(4:0).

◆ riscv_intrinsic_binvi20()

uint32_t riscv_intrinsic_binvi20 ( uint32_t  rs1)
inline

Intrinsic: Bit manipulation BINVI (bit-invert) by 20 positions. [B.Zbs]

Warning
Fixed shift amount (20) for now.
Parameters
[in]rs1Source operand 1.
Returns
Invert bit from Operand 1 at position 20.

◆ riscv_intrinsic_bset()

uint32_t riscv_intrinsic_bset ( uint32_t  rs1,
uint32_t  rs2 
)
inline

Intrinsic: Bit manipulation BSET (bit-set) [B.Zbs]

Parameters
[in]rs1Source operand 1.
[in]rs2Source operand 2.
Returns
set bit from Operand 1 indexed by operand_2(4:0).

◆ riscv_intrinsic_bseti20()

uint32_t riscv_intrinsic_bseti20 ( uint32_t  rs1)
inline

Intrinsic: Bit manipulation BSETI (bit-set) by 20 positions. [B.Zbs]

Warning
Fixed shift amount (20) for now.
Parameters
[in]rs1Source operand 1.
Returns
Set bit from Operand 1 at position 20.

◆ riscv_intrinsic_clmul()

uint32_t riscv_intrinsic_clmul ( uint32_t  rs1,
uint32_t  rs2 
)
inline

Intrinsic: Bit manipulation CLMUL (carry-less multiplication, low-part) [B.Zbc]

Parameters
[in]rs1Source operand 1.
[in]rs2Source operand 2.
Returns
Carry-less product, low part.

◆ riscv_intrinsic_clmulh()

uint32_t riscv_intrinsic_clmulh ( uint32_t  rs1,
uint32_t  rs2 
)
inline

Intrinsic: Bit manipulation CLMULH (carry-less multiplication, high-part) [B.Zbc]

Parameters
[in]rs1Source operand 1.
[in]rs2Source operand 2.
Returns
Carry-less product, high part.

◆ riscv_intrinsic_clmulr()

uint32_t riscv_intrinsic_clmulr ( uint32_t  rs1,
uint32_t  rs2 
)
inline

Intrinsic: Bit manipulation CLMULR (carry-less multiplication, reversed) [B.Zbc]

Parameters
[in]rs1Source operand 1.
[in]rs2Source operand 2.
Returns
Carry-less product, low part, reversed.

◆ riscv_intrinsic_clz()

uint32_t riscv_intrinsic_clz ( uint32_t  rs1)
inline

Intrinsic: Bit manipulation CLZ (count leading zeros) [B.Zbb]

Parameters
[in]rs1Source operand 1.
Returns
Number of leading zeros in source operand.

◆ riscv_intrinsic_cpop()

uint32_t riscv_intrinsic_cpop ( uint32_t  rs1)
inline

Intrinsic: Bit manipulation CPOP (count set bits) [B.Zbb]

Parameters
[in]rs1Source operand 1.
Returns
Number of set bits in source operand.

◆ riscv_intrinsic_ctz()

uint32_t riscv_intrinsic_ctz ( uint32_t  rs1)
inline

Intrinsic: Bit manipulation CTZ (count trailing zeros) [B.Zbb]

Parameters
[in]rs1Source operand 1.
Returns
Number of trailing zeros in source operand.

◆ riscv_intrinsic_max()

uint32_t riscv_intrinsic_max ( uint32_t  rs1,
uint32_t  rs2 
)
inline

Intrinsic: Bit manipulation MAX (select signed maximum) [B.Zbb]

Parameters
[in]rs1Source operand 1.
[in]rs2Source operand 2.
Returns
Signed maximum.

◆ riscv_intrinsic_maxu()

uint32_t riscv_intrinsic_maxu ( uint32_t  rs1,
uint32_t  rs2 
)
inline

Intrinsic: Bit manipulation MAXU (select unsigned maximum) [B.Zbb]

Parameters
[in]rs1Source operand 1.
[in]rs2Source operand 2.
Returns
Unsigned maximum.

◆ riscv_intrinsic_min()

uint32_t riscv_intrinsic_min ( uint32_t  rs1,
uint32_t  rs2 
)
inline

Intrinsic: Bit manipulation MIN (select signed minimum) [B.Zbb]

Parameters
[in]rs1Source operand 1.
[in]rs2Source operand 2.
Returns
Signed minimum.

◆ riscv_intrinsic_minu()

uint32_t riscv_intrinsic_minu ( uint32_t  rs1,
uint32_t  rs2 
)
inline

Intrinsic: Bit manipulation MINU (select unsigned minimum) [B.Zbb]

Parameters
[in]rs1Source operand 1.
[in]rs2Source operand 2.
Returns
Unsigned minimum.

◆ riscv_intrinsic_orcb()

uint32_t riscv_intrinsic_orcb ( uint32_t  rs1)
inline

Intrinsic: Bit manipulation ORC.B (or-combine byte) [B.Zbb]

Parameters
[in]rs1Source operand 1.
Returns
OR-combined bytes of operand 1.

◆ riscv_intrinsic_orn()

uint32_t riscv_intrinsic_orn ( uint32_t  rs1,
uint32_t  rs2 
)
inline

Intrinsic: Bit manipulation ORN (logical or-negate) [B.Zbb]

Parameters
[in]rs1Source operand 1.
[in]rs2Source operand 2.
Returns
Operand 1 OR NOT operand 2.

◆ riscv_intrinsic_rev8()

uint32_t riscv_intrinsic_rev8 ( uint32_t  rs1)
inline

Intrinsic: Bit manipulation REV8 (byte-swap) [B.Zbb]

Parameters
[in]rs1Source operand 1.
Returns
Byte swap of operand 1

◆ riscv_intrinsic_rol()

uint32_t riscv_intrinsic_rol ( uint32_t  rs1,
uint32_t  rs2 
)
inline

Intrinsic: Bit manipulation ROL (rotate-left) [B.Zbb]

Parameters
[in]rs1Source operand 1.
[in]rs2Source operand 2.
Returns
Operand 1 rotated left by operand_2(4:0) positions.

◆ riscv_intrinsic_ror()

uint32_t riscv_intrinsic_ror ( uint32_t  rs1,
uint32_t  rs2 
)
inline

Intrinsic: Bit manipulation ROR (rotate-right) [B.Zbb]

Parameters
[in]rs1Source operand 1.
[in]rs2Source operand 2.
Returns
Operand 1 rotated right by operand_2(4:0) positions.

◆ riscv_intrinsic_rori20()

uint32_t riscv_intrinsic_rori20 ( uint32_t  rs1)
inline

Intrinsic: Bit manipulation RORI (rotate-right) by 20 positions. [B.Zbb]

Warning
Fixed shift amount (20) for now.
Parameters
[in]rs1Source operand 1.
Returns
Operand 1 rotated right by 20 positions.

◆ riscv_intrinsic_sextb()

uint32_t riscv_intrinsic_sextb ( uint32_t  rs1)
inline

Intrinsic: Bit manipulation SEXT.B (sign-extend byte) [B.Zbb]

Parameters
[in]rs1Source operand 1.
Returns
Sign extended byte (operand(7:0)).

◆ riscv_intrinsic_sexth()

uint32_t riscv_intrinsic_sexth ( uint32_t  rs1)
inline

Intrinsic: Bit manipulation SEXT.H (sign-extend half-word) [B.Zbb]

Parameters
[in]rs1Source operand 1.
Returns
Sign-extended half-word (operand(15:0)).

◆ riscv_intrinsic_sh1add()

uint32_t riscv_intrinsic_sh1add ( uint32_t  rs1,
uint32_t  rs2 
)
inline

Intrinsic: Address generation instructions SH1ADD (add with logical-1-shift) [B.Zba]

Parameters
[in]rs1Source operand 1.
[in]rs2Source operand 2.
Returns
Operand 2 + (Operand 1 << 1)

◆ riscv_intrinsic_sh2add()

uint32_t riscv_intrinsic_sh2add ( uint32_t  rs1,
uint32_t  rs2 
)
inline

Intrinsic: Address generation instructions SH2ADD (add with logical-2-shift) [B.Zba]

Parameters
[in]rs1Source operand 1.
[in]rs2Source operand 2.
Returns
Operand 2 + (Operand 1 << 2)

◆ riscv_intrinsic_sh3add()

uint32_t riscv_intrinsic_sh3add ( uint32_t  rs1,
uint32_t  rs2 
)
inline

Intrinsic: Address generation instructions SH1ADD (add with logical-3-shift) [B.Zba]

Parameters
[in]rs1Source operand 1.
[in]rs2Source operand 2.
Returns
Operand 2 + (Operand 1 << 3)

◆ riscv_intrinsic_xnor()

uint32_t riscv_intrinsic_xnor ( uint32_t  rs1,
uint32_t  rs2 
)
inline

Intrinsic: Bit manipulation XNOR (logical xor-negate) [B.Zbb]

Parameters
[in]rs1Source operand 1.
[in]rs2Source operand 2.
Returns
Operand 1 XOR NOT operand 2.

◆ riscv_intrinsic_zexth()

uint32_t riscv_intrinsic_zexth ( uint32_t  rs1)
inline

Intrinsic: Bit manipulation ZEXT.H (zero-extend half-word) [B.Zbb]

Parameters
[in]rs1Source operand 1.
Returns
Zero-extended half-word (operand(15:0)).