neorv32_pwm.h

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// ================================================================================ //
// The NEORV32 RISC-V Processor - https://github.com/stnolting/neorv32              //
// Copyright (c) NEORV32 contributors.                                              //
// Copyright (c) 2020 - 2025 Stephan Nolting. All rights reserved.                  //
// Licensed under the BSD-3-Clause license, see LICENSE for details.                //
// SPDX-License-Identifier: BSD-3-Clause                                            //
// ================================================================================ //
 
#ifndef NEORV32_PWM_H
#define NEORV32_PWM_H
 
#include <stdint.h>
 
 
/**********************************************************************/
typedef volatile struct __attribute__((packed,aligned(4))) {
  uint32_t ENABLE;             
  uint32_t POLARITY;           
  uint32_t CLKPRSC;            
  const uint32_t reserved[13]; 
  union {
    uint32_t TOPCMP; 
    struct {
      uint16_t CMP;  
      uint16_t TOP;  
    };
  } CHANNEL[16];
} neorv32_pwm_t;
 
#define NEORV32_PWM ((neorv32_pwm_t*) (NEORV32_PWM_BASE))
/**********************************************************************/
int  neorv32_pwm_available(void);
int  neorv32_pmw_get_num_channels(void);
void neorv32_pwm_set_clock(int prsc);
void neorv32_pwm_ch_enable_mask(uint32_t mask);
void neorv32_pwm_ch_disable_mask(uint32_t mask);
void neorv32_pwm_ch_enable_single(int ch);
void neorv32_pwm_ch_disable_single(int ch);
void neorv32_pwm_ch_setup(int ch, int top, int pol);
void neorv32_pwm_ch_set_duty(int ch, int duty);
#endif // NEORV32_PWM_H