neorv32_pwm.h

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// ================================================================================ //
// The NEORV32 RISC-V Processor - https://github.com/stnolting/neorv32              //
// Copyright (c) NEORV32 contributors.                                              //
// Copyright (c) 2020 - 2024 Stephan Nolting. All rights reserved.                  //
// Licensed under the BSD-3-Clause license, see LICENSE for details.                //
// SPDX-License-Identifier: BSD-3-Clause                                            //
// ================================================================================ //
 
#ifndef neorv32_pwm_h
#define neorv32_pwm_h
 
#include <stdint.h>
 
 
/**********************************************************************/
typedef volatile struct __attribute__((packed,aligned(4))) {
  uint32_t CHANNEL_CFG[16]; 
} neorv32_pwm_t;
 
#define NEORV32_PWM ((neorv32_pwm_t*) (NEORV32_PWM_BASE))
 
enum CHANNEL_CFG_enum {
  PWM_CFG_DUTY_LSB =  0, 
  PWM_CFG_DUTY_MSB =  7, 
  PWM_CFG_CDIV_LSB =  8, 
  PWM_CFG_CDIV_MSB = 17, 
  PWM_CFG_PRSC_LSB = 28, 
  PWM_CFG_PRSC_MSB = 30, 
  PWM_CFG_EN       = 31  
};
/**********************************************************************/
int  neorv32_pwm_available(void);
int  neorv32_pmw_get_num_channels(void);
void neorv32_pwm_ch_enable(int channel);
void neorv32_pwm_ch_disable(int channel);
void neorv32_pwm_ch_set_clock(int channel, int prsc, int cdiv);
void neorv32_pwm_ch_set_duty(int channel, int duty);
#endif // neorv32_pwm_h