41#ifndef neorv32_sysinfo_h
42#define neorv32_sysinfo_h
49typedef volatile struct __attribute__((packed,aligned(4))) {
57#define NEORV32_SYSINFO ((neorv32_sysinfo_t*) (NEORV32_SYSINFO_BASE))
60enum NEORV32_SYSINFO_MEM_enum {
68enum NEORV32_SYSINFO_SOC_enum {
69 SYSINFO_SOC_BOOTLOADER = 0,
71 SYSINFO_SOC_MEM_INT_IMEM = 2,
72 SYSINFO_SOC_MEM_INT_DMEM = 3,
74 SYSINFO_SOC_ICACHE = 5,
75 SYSINFO_SOC_DCACHE = 6,
76 SYSINFO_SOC_CLOCK_GATING = 7,
77 SYSINFO_SOC_XBUS_CACHE = 8,
79 SYSINFO_SOC_XIP_CACHE = 10,
81 SYSINFO_SOC_IO_DMA = 14,
82 SYSINFO_SOC_IO_GPIO = 15,
83 SYSINFO_SOC_IO_MTIME = 16,
84 SYSINFO_SOC_IO_UART0 = 17,
85 SYSINFO_SOC_IO_SPI = 18,
86 SYSINFO_SOC_IO_TWI = 19,
87 SYSINFO_SOC_IO_PWM = 20,
88 SYSINFO_SOC_IO_WDT = 21,
89 SYSINFO_SOC_IO_CFS = 22,
90 SYSINFO_SOC_IO_TRNG = 23,
91 SYSINFO_SOC_IO_SDI = 24,
92 SYSINFO_SOC_IO_UART1 = 25,
93 SYSINFO_SOC_IO_NEOLED = 26,
94 SYSINFO_SOC_IO_XIRQ = 27,
95 SYSINFO_SOC_IO_GPTMR = 28,
96 SYSINFO_SOC_IO_SLINK = 29,
97 SYSINFO_SOC_IO_ONEWIRE = 30,
98 SYSINFO_SOC_IO_CRC = 31
102 enum NEORV32_SYSINFO_CACHE_enum {
103 SYSINFO_CACHE_INST_BLOCK_SIZE_0 = 0,
104 SYSINFO_CACHE_INST_BLOCK_SIZE_3 = 3,
105 SYSINFO_CACHE_INST_NUM_BLOCKS_0 = 4,
106 SYSINFO_CACHE_INST_NUM_BLOCKS_3 = 7,
108 SYSINFO_CACHE_DATA_BLOCK_SIZE_0 = 8,
109 SYSINFO_CACHE_DATA_BLOCK_SIZE_3 = 11,
110 SYSINFO_CACHE_DATA_NUM_BLOCKS_0 = 12,
111 SYSINFO_CACHE_DATA_NUM_BLOCKS_3 = 15,
113 SYSINFO_CACHE_XIP_BLOCK_SIZE_0 = 16,
114 SYSINFO_CACHE_XIP_BLOCK_SIZE_3 = 19,
115 SYSINFO_CACHE_XIP_NUM_BLOCKS_0 = 20,
116 SYSINFO_CACHE_XIP_NUM_BLOCKS_3 = 23,
118 SYSINFO_CACHE_XBUS_BLOCK_SIZE_0 = 24,
119 SYSINFO_CACHE_XBUS_BLOCK_SIZE_3 = 27,
120 SYSINFO_CACHE_XBUS_NUM_BLOCKS_0 = 28,
121 SYSINFO_CACHE_XBUS_NUM_BLOCKS_3 = 31
Definition neorv32_sysinfo.h:49
const uint32_t SOC
Definition neorv32_sysinfo.h:52
const uint32_t CACHE
Definition neorv32_sysinfo.h:53
const uint32_t CLK
Definition neorv32_sysinfo.h:50