NEORV32 - Software Framework Documentation
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neorv32_sysinfo.h
1// #################################################################################################
2// # << NEORV32: neorv32_sysinfo.h - System Information Memory (SYSINFO) HW Driver >> #
3// # ********************************************************************************************* #
4// # BSD 3-Clause License #
5// # #
6// # Copyright (c) 2023, Stephan Nolting. All rights reserved. #
7// # #
8// # Redistribution and use in source and binary forms, with or without modification, are #
9// # permitted provided that the following conditions are met: #
10// # #
11// # 1. Redistributions of source code must retain the above copyright notice, this list of #
12// # conditions and the following disclaimer. #
13// # #
14// # 2. Redistributions in binary form must reproduce the above copyright notice, this list of #
15// # conditions and the following disclaimer in the documentation and/or other materials #
16// # provided with the distribution. #
17// # #
18// # 3. Neither the name of the copyright holder nor the names of its contributors may be used to #
19// # endorse or promote products derived from this software without specific prior written #
20// # permission. #
21// # #
22// # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS #
23// # OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF #
24// # MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE #
25// # COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, #
26// # EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE #
27// # GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED #
28// # AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING #
29// # NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED #
30// # OF THE POSSIBILITY OF SUCH DAMAGE. #
31// # ********************************************************************************************* #
32// # The NEORV32 Processor - https://github.com/stnolting/neorv32 (c) Stephan Nolting #
33// #################################################################################################
34
35
36/**********************************************************************/
41#ifndef neorv32_sysinfo_h
42#define neorv32_sysinfo_h
43
44/**********************************************************************/
49typedef volatile struct __attribute__((packed,aligned(4))) {
50 const uint32_t CLK;
51 const uint32_t CUSTOM_ID;
52 const uint32_t SOC;
53 const uint32_t CACHE;
54 const uint32_t ISPACE_BASE;
55 const uint32_t DSPACE_BASE;
56 const uint32_t IMEM_SIZE;
57 const uint32_t DMEM_SIZE;
58} neorv32_sysinfo_t;
59
61#define NEORV32_SYSINFO ((neorv32_sysinfo_t*) (NEORV32_SYSINFO_BASE))
62
64enum NEORV32_SYSINFO_SOC_enum {
65 SYSINFO_SOC_BOOTLOADER = 0,
66 SYSINFO_SOC_MEM_EXT = 1,
67 SYSINFO_SOC_MEM_INT_IMEM = 2,
68 SYSINFO_SOC_MEM_INT_DMEM = 3,
69 SYSINFO_SOC_MEM_EXT_ENDIAN = 4,
70 SYSINFO_SOC_ICACHE = 5,
71 SYSINFO_SOC_DCACHE = 6,
73 SYSINFO_SOC_IS_SIM = 13,
74 SYSINFO_SOC_OCD = 14,
76 SYSINFO_SOC_IO_GPIO = 16,
77 SYSINFO_SOC_IO_MTIME = 17,
78 SYSINFO_SOC_IO_UART0 = 18,
79 SYSINFO_SOC_IO_SPI = 19,
80 SYSINFO_SOC_IO_TWI = 20,
81 SYSINFO_SOC_IO_PWM = 21,
82 SYSINFO_SOC_IO_WDT = 22,
83 SYSINFO_SOC_IO_CFS = 23,
84 SYSINFO_SOC_IO_TRNG = 24,
85 SYSINFO_SOC_IO_SDI = 25,
86 SYSINFO_SOC_IO_UART1 = 26,
87 SYSINFO_SOC_IO_NEOLED = 27,
88 SYSINFO_SOC_IO_XIRQ = 28,
89 SYSINFO_SOC_IO_GPTMR = 29,
90 SYSINFO_SOC_IO_XIP = 30,
91 SYSINFO_SOC_IO_ONEWIRE = 31
92};
93
95 enum NEORV32_SYSINFO_CACHE_enum {
96 SYSINFO_CACHE_IC_BLOCK_SIZE_0 = 0,
97 SYSINFO_CACHE_IC_BLOCK_SIZE_1 = 1,
98 SYSINFO_CACHE_IC_BLOCK_SIZE_2 = 2,
99 SYSINFO_CACHE_IC_BLOCK_SIZE_3 = 3,
101 SYSINFO_CACHE_IC_NUM_BLOCKS_0 = 4,
102 SYSINFO_CACHE_IC_NUM_BLOCKS_1 = 5,
103 SYSINFO_CACHE_IC_NUM_BLOCKS_2 = 6,
104 SYSINFO_CACHE_IC_NUM_BLOCKS_3 = 7,
106 SYSINFO_CACHE_IC_ASSOCIATIVITY_0 = 8,
107 SYSINFO_CACHE_IC_ASSOCIATIVITY_1 = 9,
108 SYSINFO_CACHE_IC_ASSOCIATIVITY_2 = 10,
109 SYSINFO_CACHE_IC_ASSOCIATIVITY_3 = 11,
111 SYSINFO_CACHE_IC_REPLACEMENT_0 = 12,
112 SYSINFO_CACHE_IC_REPLACEMENT_1 = 13,
113 SYSINFO_CACHE_IC_REPLACEMENT_2 = 14,
114 SYSINFO_CACHE_IC_REPLACEMENT_3 = 15,
116 SYSINFO_CACHE_DC_BLOCK_SIZE_0 = 16,
117 SYSINFO_CACHE_DC_BLOCK_SIZE_1 = 17,
118 SYSINFO_CACHE_DC_BLOCK_SIZE_2 = 18,
119 SYSINFO_CACHE_DC_BLOCK_SIZE_3 = 19,
121 SYSINFO_CACHE_DC_NUM_BLOCKS_0 = 20,
122 SYSINFO_CACHE_DC_NUM_BLOCKS_1 = 21,
123 SYSINFO_CACHE_DC_NUM_BLOCKS_2 = 22,
124 SYSINFO_CACHE_DC_NUM_BLOCKS_3 = 23,
126 SYSINFO_CACHE_DC_ASSOCIATIVITY_0 = 24,
127 SYSINFO_CACHE_DC_ASSOCIATIVITY_1 = 25,
128 SYSINFO_CACHE_DC_ASSOCIATIVITY_2 = 26,
129 SYSINFO_CACHE_DC_ASSOCIATIVITY_3 = 27,
131 SYSINFO_CACHE_DC_REPLACEMENT_0 = 28,
132 SYSINFO_CACHE_DC_REPLACEMENT_1 = 29,
133 SYSINFO_CACHE_DC_REPLACEMENT_2 = 30,
134 SYSINFO_CACHE_DC_REPLACEMENT_3 = 31,
135};
139#endif // neorv32_sysinfo_h
neorv32_sysinfo_t
Definition: neorv32_sysinfo.h:49
neorv32_sysinfo_t::DSPACE_BASE
const uint32_t DSPACE_BASE
Definition: neorv32_sysinfo.h:55
neorv32_sysinfo_t::CUSTOM_ID
const uint32_t CUSTOM_ID
Definition: neorv32_sysinfo.h:51
neorv32_sysinfo_t::DMEM_SIZE
const uint32_t DMEM_SIZE
Definition: neorv32_sysinfo.h:57
neorv32_sysinfo_t::IMEM_SIZE
const uint32_t IMEM_SIZE
Definition: neorv32_sysinfo.h:56
neorv32_sysinfo_t::SOC
const uint32_t SOC
Definition: neorv32_sysinfo.h:52
neorv32_sysinfo_t::ISPACE_BASE
const uint32_t ISPACE_BASE
Definition: neorv32_sysinfo.h:54
neorv32_sysinfo_t::CACHE
const uint32_t CACHE
Definition: neorv32_sysinfo.h:53
neorv32_sysinfo_t::CLK
const uint32_t CLK
Definition: neorv32_sysinfo.h:50
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