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NEORV32 API Reference
The NEORV32 RISC-V Processor
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#include <neorv32_gptmr.h>
Data Fields | ||
| union { | ||
| uint32_t WORD | ||
| struct { | ||
| uint16_t ENABLE | ||
| uint16_t MODE | ||
| } | ||
| } | CSR0 | |
| union { | ||
| uint32_t WORD | ||
| struct { | ||
| uint16_t IRQ | ||
| uint16_t PRSC | ||
| } | ||
| } | CSR1 | |
| const uint32_t | reserved [30] | |
| struct { | ||
| uint32_t CNT | ||
| uint32_t THR | ||
| } | SLICE [16] | |
GPTMR module prototype
| uint32_t neorv32_gptmr_t::CNT |
per-slice counter
| union { ... } neorv32_gptmr_t::CSR0 |
control and status register 0
| union { ... } neorv32_gptmr_t::CSR1 |
control and status register 0
| uint16_t neorv32_gptmr_t::ENABLE |
per-slice enable
| uint16_t neorv32_gptmr_t::IRQ |
per-slice interrupt pending/ACK
| uint16_t neorv32_gptmr_t::MODE |
per-slice mode
| uint16_t neorv32_gptmr_t::PRSC |
global clock prescaler
| struct { ... } neorv32_gptmr_t::SLICE[16] |
reserved
| uint32_t neorv32_gptmr_t::THR |
per-slice threshold value
| uint32_t neorv32_gptmr_t::WORD |
CSR0 full word access
CSR1 full word access