NEORV32 Software Framework Documentation
The NEORV32 RISC-V Processor
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main.c File Reference

Demo program for emulating unaligned memory accesses using the NEORV32 run-time environment (RTE). More...

#include <neorv32.h>

Macros

User configuration
#define BAUD_RATE   19200
 
#define DEBUG_INFO   0
 

Global variables

volatile uint32_t data_block [2]
 
void trap_handler_emulate_unaligned_lw (void)
 
int main ()
 

Detailed Description

Demo program for emulating unaligned memory accesses using the NEORV32 run-time environment (RTE).

Author
Stephan Nolting

Macro Definition Documentation

◆ BAUD_RATE

#define BAUD_RATE   19200

UART BAUD rate

◆ DEBUG_INFO

#define DEBUG_INFO   0

Show debug info when 1

Function Documentation

◆ main()

int main ( void )

Demo program to showcase RTE-based emulation of unaligned memory accesses.

Returns
Irrelevant.

◆ trap_handler_emulate_unaligned_lw()

void trap_handler_emulate_unaligned_lw ( void )

Emulate unaligned load-word operation

Note
This is a RTE "second-level" trap handler.
Warning
Compressed load instructions are not supported here!

Variable Documentation

◆ data_block

volatile uint32_t data_block[2]

Emulate unaligned load-word operation

Note
This is a RTE "second-level" trap handler.
Warning
Compressed load instructions are not supported here!