NEORV32 - Software Framework Documentation
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neorv32_cpu.h
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1// #################################################################################################
2// # << NEORV32: neorv32_cpu.h - CPU Core Functions HW Driver >> #
3// # ********************************************************************************************* #
4// # BSD 3-Clause License #
5// # #
6// # Copyright (c) 2023, Stephan Nolting. All rights reserved. #
7// # #
8// # Redistribution and use in source and binary forms, with or without modification, are #
9// # permitted provided that the following conditions are met: #
10// # #
11// # 1. Redistributions of source code must retain the above copyright notice, this list of #
12// # conditions and the following disclaimer. #
13// # #
14// # 2. Redistributions in binary form must reproduce the above copyright notice, this list of #
15// # conditions and the following disclaimer in the documentation and/or other materials #
16// # provided with the distribution. #
17// # #
18// # 3. Neither the name of the copyright holder nor the names of its contributors may be used to #
19// # endorse or promote products derived from this software without specific prior written #
20// # permission. #
21// # #
22// # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS #
23// # OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF #
24// # MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE #
25// # COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, #
26// # EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE #
27// # GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED #
28// # AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING #
29// # NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED #
30// # OF THE POSSIBILITY OF SUCH DAMAGE. #
31// # ********************************************************************************************* #
32// # The NEORV32 Processor - https://github.com/stnolting/neorv32 (c) Stephan Nolting #
33// #################################################################################################
34
35
36/**********************************************************************/
41#ifndef neorv32_cpu_h
42#define neorv32_cpu_h
43
44
45/**********************************************************************/
49void neorv32_cpu_irq_enable(int irq_sel);
50void neorv32_cpu_irq_disable(int irq_sel);
51uint64_t neorv32_cpu_get_cycle(void);
52void neorv32_cpu_set_mcycle(uint64_t value);
53uint64_t neorv32_cpu_get_instret(void);
54void neorv32_cpu_set_minstret(uint64_t value);
55void neorv32_cpu_delay_ms(uint32_t time_ms);
56uint32_t neorv32_cpu_get_clk_from_prsc(int prsc);
59int neorv32_cpu_pmp_configure_region(int index, uint32_t addr, uint8_t config);
61uint32_t neorv32_cpu_hpm_get_size(void);
66// #################################################################################################
67// Load/store
68// #################################################################################################
69
70
71/**********************************************************************/
79inline void __attribute__ ((always_inline)) neorv32_cpu_store_unsigned_word(uint32_t addr, uint32_t wdata) {
80
81 uint32_t reg_addr = addr;
82 uint32_t reg_data = wdata;
83
84 asm volatile ("sw %[da], 0(%[ad])" : : [da] "r" (reg_data), [ad] "r" (reg_addr));
85}
86
87
88/**********************************************************************/
96inline void __attribute__ ((always_inline)) neorv32_cpu_store_unsigned_half(uint32_t addr, uint16_t wdata) {
97
98 uint32_t reg_addr = addr;
99 uint32_t reg_data = (uint32_t)wdata;
100
101 asm volatile ("sh %[da], 0(%[ad])" : : [da] "r" (reg_data), [ad] "r" (reg_addr));
102}
103
104
105/**********************************************************************/
111inline void __attribute__ ((always_inline)) neorv32_cpu_store_unsigned_byte(uint32_t addr, uint8_t wdata) {
112
113 uint32_t reg_addr = addr;
114 uint32_t reg_data = (uint32_t)wdata;
115
116 asm volatile ("sb %[da], 0(%[ad])" : : [da] "r" (reg_data), [ad] "r" (reg_addr));
117}
118
119
120/**********************************************************************/
128inline uint32_t __attribute__ ((always_inline)) neorv32_cpu_load_unsigned_word(uint32_t addr) {
129
130 uint32_t reg_addr = addr;
131 uint32_t reg_data;
132
133 asm volatile ("lw %[da], 0(%[ad])" : [da] "=r" (reg_data) : [ad] "r" (reg_addr));
134
135 return reg_data;
136}
137
138
139/**********************************************************************/
147inline uint16_t __attribute__ ((always_inline)) neorv32_cpu_load_unsigned_half(uint32_t addr) {
148
149 uint32_t reg_addr = addr;
150 uint16_t reg_data;
151
152 asm volatile ("lhu %[da], 0(%[ad])" : [da] "=r" (reg_data) : [ad] "r" (reg_addr));
153
154 return reg_data;
155}
156
157
158/**********************************************************************/
166inline int16_t __attribute__ ((always_inline)) neorv32_cpu_load_signed_half(uint32_t addr) {
167
168 uint32_t reg_addr = addr;
169 int16_t reg_data;
170
171 asm volatile ("lh %[da], 0(%[ad])" : [da] "=r" (reg_data) : [ad] "r" (reg_addr));
172
173 return reg_data;
174}
175
176
177/**********************************************************************/
183inline uint8_t __attribute__ ((always_inline)) neorv32_cpu_load_unsigned_byte(uint32_t addr) {
184
185 uint32_t reg_addr = addr;
186 uint8_t reg_data;
187
188 asm volatile ("lbu %[da], 0(%[ad])" : [da] "=r" (reg_data) : [ad] "r" (reg_addr));
189
190 return reg_data;
191}
192
193
194/**********************************************************************/
200inline int8_t __attribute__ ((always_inline)) neorv32_cpu_load_signed_byte(uint32_t addr) {
201
202 uint32_t reg_addr = addr;
203 int8_t reg_data;
204
205 asm volatile ("lb %[da], 0(%[ad])" : [da] "=r" (reg_data) : [ad] "r" (reg_addr));
206
207 return reg_data;
208}
209
210
211// #################################################################################################
212// Atomic memory access / load-reservate/store-conditional
213// #################################################################################################
214
215
216/**********************************************************************/
225inline uint32_t __attribute__ ((always_inline)) neorv32_cpu_load_reservate_word(uint32_t addr) {
226
227#if defined __riscv_atomic
228 uint32_t amo_addr = addr;
229 uint32_t amo_rdata;
230
231 asm volatile ("lr.w %[dst], 0(%[addr])" : [dst] "=r" (amo_rdata) : [addr] "r" (amo_addr));
232
233 return amo_rdata;
234#else
235 (void)addr;
236
237 return 0;
238#endif
239}
240
241
242/**********************************************************************/
252inline uint32_t __attribute__ ((always_inline)) neorv32_cpu_store_conditional_word(uint32_t addr, uint32_t wdata) {
253
254#if defined __riscv_atomic
255 uint32_t amo_addr = addr;
256 uint32_t amo_wdata = wdata;
257 uint32_t amo_status;
258
259 asm volatile ("sc.w %[dst], %[src], (%[addr])" : [dst] "=r" (amo_status) : [src] "r" (amo_wdata), [addr] "r" (amo_addr));
260
261 return amo_status;
262#else
263 (void)addr;
264 (void)wdata;
265
266 return 1; // always fail
267#endif
268}
269
270
271/**********************************************************************/
276inline void __attribute__ ((always_inline)) neorv32_cpu_invalidate_reservations(void) {
277
278#if defined __riscv_atomic
279 asm volatile ("sc.w zero, zero, (zero)");
280#endif
281}
282
283
284// #################################################################################################
285// CSR access
286// #################################################################################################
287
288
289/**********************************************************************/
295inline uint32_t __attribute__ ((always_inline)) neorv32_cpu_csr_read(const int csr_id) {
296
297 uint32_t csr_data;
298
299 asm volatile ("csrr %[result], %[input_i]" : [result] "=r" (csr_data) : [input_i] "i" (csr_id));
300
301 return csr_data;
302}
303
304
305/**********************************************************************/
311inline void __attribute__ ((always_inline)) neorv32_cpu_csr_write(const int csr_id, uint32_t data) {
312
313 uint32_t csr_data = data;
314
315 asm volatile ("csrw %[input_i], %[input_j]" : : [input_i] "i" (csr_id), [input_j] "r" (csr_data));
316}
317
318
319/**********************************************************************/
325inline void __attribute__ ((always_inline)) neorv32_cpu_csr_set(const int csr_id, uint32_t mask) {
326
327 uint32_t csr_data = mask;
328
329 asm volatile ("csrs %[input_i], %[input_j]" : : [input_i] "i" (csr_id), [input_j] "r" (csr_data));
330}
331
332
333/**********************************************************************/
339inline void __attribute__ ((always_inline)) neorv32_cpu_csr_clr(const int csr_id, uint32_t mask) {
340
341 uint32_t csr_data = mask;
342
343 asm volatile ("csrc %[input_i], %[input_j]" : : [input_i] "i" (csr_id), [input_j] "r" (csr_data));
344}
345
346
347// #################################################################################################
348// Misc
349// #################################################################################################
350
351
352/**********************************************************************/
357extern void __attribute__ ((weak)) __neorv32_crt0_after_main(int32_t return_code);
358
359
360/**********************************************************************/
366inline void __attribute__ ((always_inline)) neorv32_cpu_sleep(void) {
367
368 asm volatile ("wfi");
369}
370
371
372#endif // neorv32_cpu_h
void neorv32_cpu_irq_disable(int irq_sel)
Definition neorv32_cpu.c:84
void __neorv32_crt0_after_main(int32_t return_code)
Definition main.c:151
void neorv32_cpu_store_unsigned_word(uint32_t addr, uint32_t wdata)
Definition neorv32_cpu.h:79
void neorv32_cpu_set_mcycle(uint64_t value)
Definition neorv32_cpu.c:125
void neorv32_cpu_csr_set(const int csr_id, uint32_t mask)
Definition neorv32_cpu.h:325
uint32_t neorv32_cpu_pmp_get_num_regions(void)
Definition neorv32_cpu.c:283
void neorv32_cpu_store_unsigned_half(uint32_t addr, uint16_t wdata)
Definition neorv32_cpu.h:96
int8_t neorv32_cpu_load_signed_byte(uint32_t addr)
Definition neorv32_cpu.h:200
uint16_t neorv32_cpu_load_unsigned_half(uint32_t addr)
Definition neorv32_cpu.h:147
uint64_t neorv32_cpu_get_instret(void)
Definition neorv32_cpu.c:146
uint32_t neorv32_cpu_load_unsigned_word(uint32_t addr)
Definition neorv32_cpu.h:128
void neorv32_cpu_set_minstret(uint64_t value)
Definition neorv32_cpu.c:175
uint32_t neorv32_cpu_hpm_get_num_counters(void)
Definition neorv32_cpu.c:421
uint32_t neorv32_cpu_load_reservate_word(uint32_t addr)
Definition neorv32_cpu.h:225
void neorv32_cpu_sleep(void)
Definition neorv32_cpu.h:366
void neorv32_cpu_irq_enable(int irq_sel)
Definition neorv32_cpu.c:71
uint32_t neorv32_cpu_get_clk_from_prsc(int prsc)
Definition neorv32_cpu.c:250
void neorv32_cpu_invalidate_reservations(void)
Definition neorv32_cpu.h:276
int neorv32_cpu_pmp_configure_region(int index, uint32_t addr, uint8_t config)
Definition neorv32_cpu.c:370
void neorv32_cpu_delay_ms(uint32_t time_ms)
Definition neorv32_cpu.c:200
uint32_t neorv32_cpu_csr_read(const int csr_id)
Definition neorv32_cpu.h:295
uint32_t neorv32_cpu_store_conditional_word(uint32_t addr, uint32_t wdata)
Definition neorv32_cpu.h:252
void neorv32_cpu_csr_clr(const int csr_id, uint32_t mask)
Definition neorv32_cpu.h:339
uint64_t neorv32_cpu_get_cycle(void)
Definition neorv32_cpu.c:96
uint8_t neorv32_cpu_load_unsigned_byte(uint32_t addr)
Definition neorv32_cpu.h:183
void neorv32_cpu_goto_user_mode(void)
Definition neorv32_cpu.c:494
uint32_t neorv32_cpu_pmp_get_granularity(void)
Definition neorv32_cpu.c:328
uint32_t neorv32_cpu_hpm_get_size(void)
Definition neorv32_cpu.c:456
int16_t neorv32_cpu_load_signed_half(uint32_t addr)
Definition neorv32_cpu.h:166
void neorv32_cpu_store_unsigned_byte(uint32_t addr, uint8_t wdata)
Definition neorv32_cpu.h:111
void neorv32_cpu_csr_write(const int csr_id, uint32_t data)
Definition neorv32_cpu.h:311