NEORV32 Software Framework Documentation
The NEORV32 RISC-V Processor
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neorv32_spi_irq.h
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1// #################################################################################################
2// # << NEORV32: neorv32_spi_irq.h - IRQ driven SPI Controller HW Driver >> #
3// # ********************************************************************************************* #
4// # BSD 3-Clause License #
5// # #
6// # Copyright (c) 2023, Stephan Nolting. All rights reserved. #
7// # #
8// # Redistribution and use in source and binary forms, with or without modification, are #
9// # permitted provided that the following conditions are met: #
10// # #
11// # 1. Redistributions of source code must retain the above copyright notice, this list of #
12// # conditions and the following disclaimer. #
13// # #
14// # 2. Redistributions in binary form must reproduce the above copyright notice, this list of #
15// # conditions and the following disclaimer in the documentation and/or other materials #
16// # provided with the distribution. #
17// # #
18// # 3. Neither the name of the copyright holder nor the names of its contributors may be used to #
19// # endorse or promote products derived from this software without specific prior written #
20// # permission. #
21// # #
22// # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS #
23// # OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF #
24// # MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE #
25// # COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, #
26// # EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE #
27// # GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED #
28// # AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING #
29// # NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED #
30// # OF THE POSSIBILITY OF SUCH DAMAGE. #
31// # ********************************************************************************************* #
32// # The NEORV32 Processor - https://github.com/stnolting/neorv32 (c) Stephan Nolting #
33// #################################################################################################
34
35
36/**********************************************************************/
44#ifndef neorv32_spi_irq_h
45#define neorv32_spi_irq_h
46
47// MIN macro
48// https://stackoverflow.com/questions/3437404/min-and-max-in-c
49#define min(a,b) \
50 ({ __typeof__ (a) _a = (a); \
51 __typeof__ (b) _b = (b); \
52 _a < _b ? _a : _b; })
53
54// data handle for ISR
55typedef struct t_neorv32_spi
56{
57 uint8_t* ptrSpiBuf;
58 uint8_t uint8Csn;
59 uint16_t uint16Fifo;
60 uint32_t uint32Total;
61 volatile uint32_t uint32Write;
62 volatile uint32_t uint32Read;
63 volatile uint8_t uint8IsBusy;
65
66
67// prototypes
70int neorv32_spi_rw(t_neorv32_spi *self, uint8_t csn, void *spi, uint32_t len);
72
73#endif // neorv32_spi_irq_h
int neorv32_spi_rw_busy(t_neorv32_spi *self)
Definition neorv32_spi_irq.c:139
int neorv32_spi_rw(t_neorv32_spi *self, uint8_t csn, void *spi, uint32_t len)
Definition neorv32_spi_irq.c:109
void neorv32_spi_init(t_neorv32_spi *self)
Definition neorv32_spi_irq.c:53
void neorv32_spi_isr(t_neorv32_spi *self)
Definition neorv32_spi_irq.c:69
Definition neorv32_spi_irq.h:56
uint8_t uint8Csn
Definition neorv32_spi_irq.h:58
uint8_t * ptrSpiBuf
Definition neorv32_spi_irq.h:57
volatile uint32_t uint32Read
Definition neorv32_spi_irq.h:62
uint16_t uint16Fifo
Definition neorv32_spi_irq.h:59
volatile uint8_t uint8IsBusy
Definition neorv32_spi_irq.h:63
uint32_t uint32Total
Definition neorv32_spi_irq.h:60
volatile uint32_t uint32Write
Definition neorv32_spi_irq.h:61