neorv32_twi.h

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// ================================================================================ //
// The NEORV32 RISC-V Processor - https://github.com/stnolting/neorv32              //
// Copyright (c) NEORV32 contributors.                                              //
// Copyright (c) Stephan Nolting. All rights reserved.                              //
// Licensed under the BSD-3-Clause license, see LICENSE for details.                //
// SPDX-License-Identifier: BSD-3-Clause                                            //
// ================================================================================ //

 
#ifndef NEORV32_TWI_H
#define NEORV32_TWI_H
 
#include <neorv32.h>
#include <stdint.h>
 
/**********************************************************************/
typedef volatile struct __attribute__((packed,aligned(4))) {
  uint32_t CTRL; 
  uint32_t DCMD; 
} neorv32_twi_t;

#define NEORV32_TWI ((neorv32_twi_t*) (NEORV32_TWI_BASE))

enum NEORV32_TWI_CTRL_enum {
  TWI_CTRL_EN        =  0, 
  TWI_CTRL_PRSC0     =  1, 
  TWI_CTRL_PRSC1     =  2, 
  TWI_CTRL_PRSC2     =  3, 
  TWI_CTRL_CDIV0     =  4, 
  TWI_CTRL_CDIV1     =  5, 
  TWI_CTRL_CDIV2     =  6, 
  TWI_CTRL_CDIV3     =  7, 
 
  TWI_CTRL_FIFO_LSB  = 15, 
  TWI_CTRL_FIFO_MSB  = 18, 
 
  TWI_CTRL_NACK      = 23, 
  TWI_CTRL_NACK_CLR  = 24, 
  TWI_CTRL_IRQ_CLR   = 25, 
  TWI_CTRL_CLAIMED   = 26, 
  TWI_CTRL_SENSE_SCL = 27, 
  TWI_CTRL_SENSE_SDA = 28, 
  TWI_CTRL_TX_FULL   = 29, 
  TWI_CTRL_RX_AVAIL  = 30, 
  TWI_CTRL_BUSY      = 31  
};

#define TWI_DCMD_START  ((uint32_t)( (1U<<8) | 0x00U ))
#define TWI_DCMD_STOP   ((uint32_t)( (1U<<8) | 0x01U ))
#define TWI_DCMD_TX     ((uint32_t)( (0U<<8)         ))
#define TWI_DCMD_RXACK  ((uint32_t)( (1U<<8) | 0x02U ))
#define TWI_DCMD_RXNACK ((uint32_t)( (1U<<8) | 0x03U ))
 
/**********************************************************************/
int      neorv32_twi_available(void);
void     neorv32_twi_setup(int prsc, int cdiv);
uint32_t neorv32_twi_get_fifo_depth(void);
uint32_t neorv32_twi_get_clock(void);
void     neorv32_twi_disable(void);
void     neorv32_twi_enable(void);
int      neorv32_twi_sense_scl(void);
int      neorv32_twi_sense_sda(void);
int      neorv32_twi_claimed(void);
int      neorv32_twi_check_nack(void);
void     neorv32_twi_irq_clr(void);
int      neorv32_twi_busy(void);
int      neorv32_twi_rx_avail(void);
int      neorv32_twi_tx_full(void);
uint8_t  neorv32_twi_rx_get(void);
void     neorv32_twi_start(void);
void     neorv32_twi_stop(void);
void     neorv32_twi_tx(uint8_t data);
void     neorv32_twi_rx_ack(void);
void     neorv32_twi_rx_nack(void);
 
/**********************************************************************/
static inline void __attribute__((always_inline)) neorv32_twi_start_nonblocking(void) {
  NEORV32_TWI->DCMD = TWI_DCMD_START;
}
 
/**********************************************************************/
static inline void __attribute__((always_inline)) neorv32_twi_stop_nonblocking(void) {
  NEORV32_TWI->DCMD = TWI_DCMD_STOP;
}
 
/**********************************************************************/
static inline void __attribute__((always_inline)) neorv32_twi_tx_nonblocking(uint8_t data) {
  NEORV32_TWI->DCMD = TWI_DCMD_TX | (uint32_t)data;
}
 
/**********************************************************************/
static inline void __attribute__((always_inline)) neorv32_twi_rx_ack_nonblocking(void) {
  NEORV32_TWI->DCMD = TWI_DCMD_RXACK;
}
 
/**********************************************************************/
static inline void __attribute__((always_inline)) neorv32_twi_rx_nack_nonblocking(void) {
  NEORV32_TWI->DCMD = TWI_DCMD_RXNACK;
}
 
#endif // NEORV32_TWI_H