neorv32_twi.h File Reference

Two-Wire Interface Controller (TWI) HW driver header file. More...

#include <neorv32.h>
#include <stdint.h>

Go to the source code of this file.

Data Structures
struct	neorv32_twi_t

Functions
static void	neorv32_twi_start_nonblocking (void)
static void	neorv32_twi_stop_nonblocking (void)
static void	neorv32_twi_tx_nonblocking (uint8_t data)
static void	neorv32_twi_rx_ack_nonblocking (void)
static void	neorv32_twi_rx_nack_nonblocking (void)
Prototypes
int	neorv32_twi_available (void)
void	neorv32_twi_setup (int prsc, int cdiv)
uint32_t	neorv32_twi_get_fifo_depth (void)
uint32_t	neorv32_twi_get_clock (void)
int	neorv32_twi_sense_scl (void)
int	neorv32_twi_sense_sda (void)
int	neorv32_twi_claimed (void)
int	neorv32_twi_check_nack (void)
void	neorv32_twi_irq_clr (void)
int	neorv32_twi_busy (void)
int	neorv32_twi_rx_avail (void)
int	neorv32_twi_tx_full (void)
uint8_t	neorv32_twi_rx_get (void)
void	neorv32_twi_start (void)
void	neorv32_twi_stop (void)
void	neorv32_twi_tx (uint8_t data)
void	neorv32_twi_rx_ack (void)
void	neorv32_twi_rx_nack (void)

IO Device: Two-Wire Interface Controller (TWI)
#define	NEORV32_TWI   ((neorv32_twi_t*) (NEORV32_TWI_BASE))
#define	TWI_DCMD_START   ((uint32_t)( (1U<<8) | 0x00U ))
#define	TWI_DCMD_STOP   ((uint32_t)( (1U<<8) | 0x01U ))
#define	TWI_DCMD_TX   ((uint32_t)( (0U<<8) ))
#define	TWI_DCMD_RXACK   ((uint32_t)( (1U<<8) | 0x02U ))
#define	TWI_DCMD_RXNACK   ((uint32_t)( (1U<<8) | 0x03U ))
enum	NEORV32_TWI_CTRL_enum {   TWI_CTRL_EN = 0 , TWI_CTRL_PRSC0 = 1 , TWI_CTRL_PRSC1 = 2 , TWI_CTRL_PRSC2 = 3 ,   TWI_CTRL_CDIV0 = 4 , TWI_CTRL_CDIV1 = 5 , TWI_CTRL_CDIV2 = 6 , TWI_CTRL_CDIV3 = 7 ,   TWI_CTRL_FIFO_LSB = 15 , TWI_CTRL_FIFO_MSB = 18 , TWI_CTRL_NACK = 23 , TWI_CTRL_NACK_CLR = 24 ,   TWI_CTRL_IRQ_CLR = 25 , TWI_CTRL_CLAIMED = 26 , TWI_CTRL_SENSE_SCL = 27 , TWI_CTRL_SENSE_SDA = 28 ,   TWI_CTRL_TX_FULL = 29 , TWI_CTRL_RX_AVAIL = 30 , TWI_CTRL_BUSY = 31 }

Detailed Description

Two-Wire Interface Controller (TWI) HW driver header file.

Macro Definition Documentation

NEORV32_TWI

#define NEORV32_TWI   ((neorv32_twi_t*) (NEORV32_TWI_BASE))

TWI module hardware handle (neorv32_twi_t)

TWI_DCMD_RXACK

#define TWI_DCMD_RXACK   ((uint32_t)( (1U<<8) | 0x02U ))

TWI module hardware handle (neorv32_twi_t)

TWI_DCMD_RXNACK

#define TWI_DCMD_RXNACK   ((uint32_t)( (1U<<8) | 0x03U ))

TWI module hardware handle (neorv32_twi_t)

TWI_DCMD_START

#define TWI_DCMD_START   ((uint32_t)( (1U<<8) | 0x00U ))

TWI DCMD command masks

TWI_DCMD_STOP

#define TWI_DCMD_STOP   ((uint32_t)( (1U<<8) | 0x01U ))

TWI module hardware handle (neorv32_twi_t)

TWI_DCMD_TX

#define TWI_DCMD_TX   ((uint32_t)( (0U<<8) ))

TWI module hardware handle (neorv32_twi_t)

Enumeration Type Documentation

NEORV32_TWI_CTRL_enum

enum NEORV32_TWI_CTRL_enum

TWI control register bits

Enumerator
TWI_CTRL_EN	TWI control register(0) (r/w): TWI enable
TWI_CTRL_PRSC0	TWI control register(1) (r/w): Clock prescaler select bit 0
TWI_CTRL_PRSC1	TWI control register(2) (r/w): Clock prescaler select bit 1
TWI_CTRL_PRSC2	TWI control register(3) (r/w): Clock prescaler select bit 2
TWI_CTRL_CDIV0	TWI control register(4) (r/w): Clock divider bit 0
TWI_CTRL_CDIV1	TWI control register(5) (r/w): Clock divider bit 1
TWI_CTRL_CDIV2	TWI control register(6) (r/w): Clock divider bit 2
TWI_CTRL_CDIV3	TWI control register(7) (r/w): Clock divider bit 3
TWI_CTRL_FIFO_LSB	TWI control register(15) (r/-): log2(FIFO size), LSB
TWI_CTRL_FIFO_MSB	TWI control register(18) (r/-): log2(FIFO size), MSB
TWI_CTRL_NACK	TWI control register(23) (r/-): TX-NACK received
TWI_CTRL_NACK_CLR	TWI control register(24) (-/w): Clear NACK flag
TWI_CTRL_IRQ_CLR	TWI control register(25) (-/w): Clear interrupt request
TWI_CTRL_CLAIMED	TWI control register(26) (r/-): Bus is claimed by controller
TWI_CTRL_SENSE_SCL	TWI control register(27) (r/-): Current state of the SCL bus line
TWI_CTRL_SENSE_SDA	TWI control register(28) (r/-): Current state of the SDA bus line
TWI_CTRL_TX_FULL	TWI control register(29) (r/-): TX FIFO full
TWI_CTRL_RX_AVAIL	TWI control register(30) (r/-): RX FIFO data available
TWI_CTRL_BUSY	TWI control register(31) (r/-): Bus engine busy or TX FIFO not empty

Function Documentation

neorv32_twi_available()

int neorv32_twi_available

(

void

)

Check if TWI unit was synthesized.

Returns

0 if TWI was not synthesized, non-zero if TWI is available.

neorv32_twi_busy()

int neorv32_twi_busy

(

void

)

Check if TWI controller is busy (TWI bus engine busy or TX FIFO not empty).

Returns

Zero if idle, non-zero if busy.

neorv32_twi_check_nack()

int neorv32_twi_check_nack

(

void

)

Check if a TX transfer returned a NACK and clear NACK flag.

Returns

Zero if no NACK, non-zero if any TX transmission returned a NACK.

neorv32_twi_claimed()

int neorv32_twi_claimed

(

void

)

Check if bus is (still) claimed by TWI controller.

Returns

Non-zero if bus is claimed, zero if bus is released.

neorv32_twi_get_clock()

uint32_t neorv32_twi_get_clock

(

void

)

Get programmed TWI bus clock speed.

Returns

Clock speed in Hz.

neorv32_twi_get_fifo_depth()

uint32_t neorv32_twi_get_fifo_depth

(

void

)

Get TWI FIFO depth.

Returns

FIFO depth (number of entries).

neorv32_twi_irq_clr()

void neorv32_twi_irq_clr

(

void

)

Clear/acknowledge interrupt request.

neorv32_twi_rx_ack()

void neorv32_twi_rx_ack

(

void

)

Issue RX data transmission with ACK (read from bus).

Note

Function blocks until command can be issued.

neorv32_twi_rx_ack_nonblocking()

void neorv32_twi_rx_ack_nonblocking ( void )

inlinestatic

Issue RX data transmission with ACK (read from bus).

Note

Non-blocking function.

neorv32_twi_rx_avail()

int neorv32_twi_rx_avail

(

void

)

Check if RX data is available.

Returns

Zero if no data available, non-zero if at least one byte is available.

neorv32_twi_rx_get()

uint8_t neorv32_twi_rx_get

(

void

)

Get RX data. Check with neorv32_twi_rx_avail before.

Returns

Data read from RX FIFO.

neorv32_twi_rx_nack()

void neorv32_twi_rx_nack

(

void

)

Issue RX data transmission with NACK (read from bus).

Note

Function blocks until command can be issued.

neorv32_twi_rx_nack_nonblocking()

void neorv32_twi_rx_nack_nonblocking ( void )

inlinestatic

Issue RX data transmission with NACK (read from bus).

Note

Non-blocking function.

neorv32_twi_sense_scl()

int neorv32_twi_sense_scl

(

void

)

Get current state of SCL bus line.

Returns

Non-zero if SCL is high, zero if SCL is low.

neorv32_twi_sense_sda()

int neorv32_twi_sense_sda

(

void

)

Get current state of SDA bus line.

Returns

Non-zero if SDA is high, zero if SDA is low.

neorv32_twi_setup()

void neorv32_twi_setup	(	int	prsc,
		int	cdiv )

Enable and configure TWI controller. The TWI control register bits are listed in NEORV32_TWI_CTRL_enum.

Parameters

[in]	prsc	Clock prescaler select (0..7). See NEORV32_CLOCK_PRSC_enum.
[in]	cdiv	Clock divider (0..15).

neorv32_twi_start()

void neorv32_twi_start

(

void

)

Issue START (or REPEATED-START) condition.

Note

Function blocks until command can be issued.

neorv32_twi_start_nonblocking()

void neorv32_twi_start_nonblocking ( void )

inlinestatic

Issue START (or REPEATED-START) condition.

Note

Non-blocking function.

neorv32_twi_stop()

void neorv32_twi_stop

(

void

)

Issue STOP condition.

Note

Function blocks until command can be issued.

neorv32_twi_stop_nonblocking()

void neorv32_twi_stop_nonblocking ( void )

inlinestatic

Issue STOP condition.

Note

Non-blocking function.

neorv32_twi_tx()

void neorv32_twi_tx

(

uint8_t

data

)

Issue TX data transmission (send data to bus).

Note

Function blocks until command can be issued.

Parameters

[in]

data

Data byte to be send.

neorv32_twi_tx_full()

int neorv32_twi_tx_full

(

void

)

Check if TX FIFO is full.

Returns

Zero if at least one free entry left, non-zero if full.

neorv32_twi_tx_nonblocking()

void neorv32_twi_tx_nonblocking ( uint8_t data )

inlinestatic

Issue TX data transmission (send data to bus).

Note

Non-blocking function.

Parameters

[in]

data

Data byte to be send.