neorv32_uart.h

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// ================================================================================ //
// The NEORV32 RISC-V Processor - https://github.com/stnolting/neorv32              //
// Copyright (c) NEORV32 contributors.                                              //
// Copyright (c) 2020 - 2025 Stephan Nolting. All rights reserved.                  //
// Licensed under the BSD-3-Clause license, see LICENSE for details.                //
// SPDX-License-Identifier: BSD-3-Clause                                            //
// ================================================================================ //

 
#ifndef NEORV32_UART_H
#define NEORV32_UART_H
 
#include <stdint.h>
#include <stdarg.h>
 
 
/**********************************************************************/
typedef volatile struct __attribute__((packed,aligned(4))) {
  uint32_t CTRL;  
  uint32_t DATA;  
} neorv32_uart_t;

#define NEORV32_UART0 ((neorv32_uart_t*) (NEORV32_UART0_BASE))

#define NEORV32_UART1 ((neorv32_uart_t*) (NEORV32_UART1_BASE))

enum NEORV32_UART_CTRL_enum {
  UART_CTRL_EN            =  0, 
  UART_CTRL_SIM_MODE      =  1, 
  UART_CTRL_HWFC_EN       =  2, 
  UART_CTRL_PRSC0         =  3, 
  UART_CTRL_PRSC1         =  4, 
  UART_CTRL_PRSC2         =  5, 
  UART_CTRL_BAUD0         =  6, 
  UART_CTRL_BAUD1         =  7, 
  UART_CTRL_BAUD2         =  8, 
  UART_CTRL_BAUD3         =  9, 
  UART_CTRL_BAUD4         = 10, 
  UART_CTRL_BAUD5         = 11, 
  UART_CTRL_BAUD6         = 12, 
  UART_CTRL_BAUD7         = 13, 
  UART_CTRL_BAUD8         = 14, 
  UART_CTRL_BAUD9         = 15, 
 
  UART_CTRL_RX_NEMPTY     = 16, 
  UART_CTRL_RX_HALF       = 17, 
  UART_CTRL_RX_FULL       = 18, 
  UART_CTRL_TX_EMPTY      = 19, 
  UART_CTRL_TX_NHALF      = 20, 
  UART_CTRL_TX_FULL       = 21, 
 
  UART_CTRL_IRQ_RX_NEMPTY = 22, 
  UART_CTRL_IRQ_RX_HALF   = 23, 
  UART_CTRL_IRQ_RX_FULL   = 24, 
  UART_CTRL_IRQ_TX_EMPTY  = 25, 
  UART_CTRL_IRQ_TX_NHALF  = 26, 
 
  UART_CTRL_RX_CLR        = 28, 
  UART_CTRL_TX_CLR        = 29, 
  UART_CTRL_RX_OVER       = 30, 
  UART_CTRL_TX_BUSY       = 31  
};

enum NEORV32_UART_DATA_enum {
  UART_DATA_RTX_LSB          =  0, 
  UART_DATA_RTX_MSB          =  7, 
 
  UART_DATA_RX_FIFO_SIZE_LSB =  8, 
  UART_DATA_RX_FIFO_SIZE_MSB = 11, 
 
  UART_DATA_TX_FIFO_SIZE_LSB = 12, 
  UART_DATA_TX_FIFO_SIZE_MSB = 15, 
};

 
 
/**********************************************************************/
int  neorv32_uart_available(neorv32_uart_t *UARTx);
int  neorv32_uart_get_rx_fifo_depth(neorv32_uart_t *UARTx);
int  neorv32_uart_get_tx_fifo_depth(neorv32_uart_t *UARTx);
void neorv32_uart_setup(neorv32_uart_t *UARTx, uint32_t baudrate, uint32_t irq_mask);
void neorv32_uart_enable(neorv32_uart_t *UARTx);
void neorv32_uart_disable(neorv32_uart_t *UARTx);
void neorv32_uart_rtscts_enable(neorv32_uart_t *UARTx);
void neorv32_uart_rtscts_disable(neorv32_uart_t *UARTx);
void neorv32_uart_putc(neorv32_uart_t *UARTx, char c);
void neorv32_uart_rx_clear(neorv32_uart_t *UARTx);
void neorv32_uart_tx_clear(neorv32_uart_t *UARTx);
int  neorv32_uart_tx_busy(neorv32_uart_t *UARTx);
int  neorv32_uart_tx_free(neorv32_uart_t *UARTx);
void neorv32_uart_tx_put(neorv32_uart_t *UARTx, char c);
char neorv32_uart_getc(neorv32_uart_t *UARTx);
int  neorv32_uart_char_received(neorv32_uart_t *UARTx);
char neorv32_uart_char_received_get(neorv32_uart_t *UARTx);
void neorv32_uart_puts(neorv32_uart_t *UARTx, const char *s);
void neorv32_uart_vprintf(neorv32_uart_t *UARTx, const char *format, va_list args);
void neorv32_uart_printf(neorv32_uart_t *UARTx, const char *format, ...);
int  neorv32_uart_scan(neorv32_uart_t *UARTx, char *buffer, int max_size, int echo);
 
 
/**********************************************************************/
#define neorv32_uart0_available()                  neorv32_uart_available(NEORV32_UART0)
#define neorv32_uart0_get_rx_fifo_depth()          neorv32_uart_get_rx_fifo_depth(NEORV32_UART0)
#define neorv32_uart0_get_tx_fifo_depth()          neorv32_uart_get_tx_fifo_depth(NEORV32_UART0)
#define neorv32_uart0_setup(baudrate, irq_mask)    neorv32_uart_setup(NEORV32_UART0, baudrate, irq_mask)
#define neorv32_uart0_disable()                    neorv32_uart_disable(NEORV32_UART0)
#define neorv32_uart0_enable()                     neorv32_uart_enable(NEORV32_UART0)
#define neorv32_uart0_rtscts_disable()             neorv32_uart_rtscts_disable(NEORV32_UART0)
#define neorv32_uart0_rtscts_enable()              neorv32_uart_rtscts_enable(NEORV32_UART0)
#define neorv32_uart0_putc(c)                      neorv32_uart_putc(NEORV32_UART0, c)
#define neorv32_uart0_rx_clear()                   neorv32_uart_rx_clear(NEORV32_UART0)
#define neorv32_uart0_tx_clear()                   neorv32_uart_tx_clear(NEORV32_UART0)
#define neorv32_uart0_tx_busy()                    neorv32_uart_tx_busy(NEORV32_UART0)
#define neorv32_uart0_tx_free()                    neorv32_uart_tx_free(NEORV32_UART0)
#define neorv32_uart0_tx_put(c)                    neorv32_uart_tx_put(NEORV32_UART0, c)
#define neorv32_uart0_getc()                       neorv32_uart_getc(NEORV32_UART0)
#define neorv32_uart0_char_received()              neorv32_uart_char_received(NEORV32_UART0)
#define neorv32_uart0_char_received_get()          neorv32_uart_char_received_get(NEORV32_UART0)
#define neorv32_uart0_puts(s)                      neorv32_uart_puts(NEORV32_UART0, s)
#define neorv32_uart0_printf(...)                  neorv32_uart_printf(NEORV32_UART0, __VA_ARGS__)
#define neorv32_uart0_scan(buffer, max_size, echo) neorv32_uart_scan(NEORV32_UART0, buffer, max_size, echo)
 
#define neorv32_uart1_available()                  neorv32_uart_available(NEORV32_UART1)
#define neorv32_uart1_get_rx_fifo_depth()          neorv32_uart_get_rx_fifo_depth(NEORV32_UART1)
#define neorv32_uart1_get_tx_fifo_depth()          neorv32_uart_get_tx_fifo_depth(NEORV32_UART1)
#define neorv32_uart1_setup(baudrate, irq_mask)    neorv32_uart_setup(NEORV32_UART1, baudrate, irq_mask)
#define neorv32_uart1_disable()                    neorv32_uart_disable(NEORV32_UART1)
#define neorv32_uart1_enable()                     neorv32_uart_enable(NEORV32_UART1)
#define neorv32_uart1_rtscts_disable()             neorv32_uart_rtscts_disable(NEORV32_UART1)
#define neorv32_uart1_rtscts_enable()              neorv32_uart_rtscts_enable(NEORV32_UART1)
#define neorv32_uart1_putc(c)                      neorv32_uart_putc(NEORV32_UART1, c)
#define neorv32_uart1_rx_clear()                   neorv32_uart_rx_clear(NEORV32_UART1)
#define neorv32_uart1_tx_clear()                   neorv32_uart_tx_clear(NEORV32_UART1)
#define neorv32_uart1_tx_busy()                    neorv32_uart_tx_busy(NEORV32_UART1)
#define neorv32_uart1_tx_free()                    neorv32_uart_tx_free(NEORV32_UART1)
#define neorv32_uart1_tx_put(c)                    neorv32_uart_tx_put(NEORV32_UART1, c)
#define neorv32_uart1_getc()                       neorv32_uart_getc(NEORV32_UART1)
#define neorv32_uart1_char_received()              neorv32_uart_char_received(NEORV32_UART1)
#define neorv32_uart1_char_received_get()          neorv32_uart_char_received_get(NEORV32_UART1)
#define neorv32_uart1_puts(s)                      neorv32_uart_puts(NEORV32_UART1, s)
#define neorv32_uart1_printf(...)                  neorv32_uart_printf(NEORV32_UART1, __VA_ARGS__)
#define neorv32_uart1_scan(buffer, max_size, echo) neorv32_uart_scan(NEORV32_UART1, buffer, max_size, echo)
 
 
#endif // NEORV32_UART_H