NEORV32 Software Framework Documentation
The NEORV32 RISC-V Processor
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neorv32_uart.h File Reference

Universal asynchronous receiver/transmitter (UART0/UART1) HW driver header file. More...

#include <stdint.h>
#include <stdarg.h>

Go to the source code of this file.

Data Structures

struct  neorv32_uart_t
 

Macros

UART wrappers for easy access
#define neorv32_uart0_available()
 
#define neorv32_uart0_get_rx_fifo_depth()
 
#define neorv32_uart0_get_tx_fifo_depth()
 
#define neorv32_uart0_setup(baudrate, irq_mask)
 
#define neorv32_uart0_disable()
 
#define neorv32_uart0_enable()
 
#define neorv32_uart0_rtscts_disable()
 
#define neorv32_uart0_rtscts_enable()
 
#define neorv32_uart0_putc(c)
 
#define neorv32_uart0_rx_clear()
 
#define neorv32_uart0_tx_clear()
 
#define neorv32_uart0_tx_busy()
 
#define neorv32_uart0_getc()
 
#define neorv32_uart0_char_received()
 
#define neorv32_uart0_char_received_get()
 
#define neorv32_uart0_puts(s)
 
#define neorv32_uart0_printf(...)
 
#define neorv32_uart0_scan(buffer, max_size, echo)
 
#define neorv32_uart1_available()
 
#define neorv32_uart1_get_rx_fifo_depth()
 
#define neorv32_uart1_get_tx_fifo_depth()
 
#define neorv32_uart1_setup(baudrate, irq_mask)
 
#define neorv32_uart1_disable()
 
#define neorv32_uart1_enable()
 
#define neorv32_uart1_rtscts_disable()
 
#define neorv32_uart1_rtscts_enable()
 
#define neorv32_uart1_putc(c)
 
#define neorv32_uart1_rx_clear()
 
#define neorv32_uart1_tx_clear()
 
#define neorv32_uart1_tx_busy()
 
#define neorv32_uart1_getc()
 
#define neorv32_uart1_char_received()
 
#define neorv32_uart1_char_received_get()
 
#define neorv32_uart1_puts(s)
 
#define neorv32_uart1_printf(...)
 
#define neorv32_uart1_scan(buffer, max_size, echo)
 

Functions

Prototypes
int neorv32_uart_available (neorv32_uart_t *UARTx)
 
int neorv32_uart_get_rx_fifo_depth (neorv32_uart_t *UARTx)
 
int neorv32_uart_get_tx_fifo_depth (neorv32_uart_t *UARTx)
 
void neorv32_uart_setup (neorv32_uart_t *UARTx, uint32_t baudrate, uint32_t irq_mask)
 
void neorv32_uart_enable (neorv32_uart_t *UARTx)
 
void neorv32_uart_disable (neorv32_uart_t *UARTx)
 
void neorv32_uart_rtscts_enable (neorv32_uart_t *UARTx)
 
void neorv32_uart_rtscts_disable (neorv32_uart_t *UARTx)
 
void neorv32_uart_putc (neorv32_uart_t *UARTx, char c)
 
void neorv32_uart_rx_clear (neorv32_uart_t *UARTx)
 
void neorv32_uart_tx_clear (neorv32_uart_t *UARTx)
 
int neorv32_uart_tx_busy (neorv32_uart_t *UARTx)
 
char neorv32_uart_getc (neorv32_uart_t *UARTx)
 
int neorv32_uart_char_received (neorv32_uart_t *UARTx)
 
char neorv32_uart_char_received_get (neorv32_uart_t *UARTx)
 
void neorv32_uart_puts (neorv32_uart_t *UARTx, const char *s)
 
void neorv32_uart_vprintf (neorv32_uart_t *UARTx, const char *format, va_list args)
 
void neorv32_uart_printf (neorv32_uart_t *UARTx, const char *format,...)
 
int neorv32_uart_scan (neorv32_uart_t *UARTx, char *buffer, int max_size, int echo)
 

IO Device: Primary/Secondary Universal Asynchronous Receiver and Transmitter (UART0 / UART1)

#define NEORV32_UART0   ((neorv32_uart_t*) (NEORV32_UART0_BASE))
 
#define NEORV32_UART1   ((neorv32_uart_t*) (NEORV32_UART1_BASE))
 
enum  NEORV32_UART_CTRL_enum {
  UART_CTRL_EN = 0 , UART_CTRL_SIM_MODE = 1 , UART_CTRL_HWFC_EN = 2 , UART_CTRL_PRSC0 = 3 ,
  UART_CTRL_PRSC1 = 4 , UART_CTRL_PRSC2 = 5 , UART_CTRL_BAUD0 = 6 , UART_CTRL_BAUD1 = 7 ,
  UART_CTRL_BAUD2 = 8 , UART_CTRL_BAUD3 = 9 , UART_CTRL_BAUD4 = 10 , UART_CTRL_BAUD5 = 11 ,
  UART_CTRL_BAUD6 = 12 , UART_CTRL_BAUD7 = 13 , UART_CTRL_BAUD8 = 14 , UART_CTRL_BAUD9 = 15 ,
  UART_CTRL_RX_NEMPTY = 16 , UART_CTRL_RX_HALF = 17 , UART_CTRL_RX_FULL = 18 , UART_CTRL_TX_EMPTY = 19 ,
  UART_CTRL_TX_NHALF = 20 , UART_CTRL_TX_FULL = 21 , UART_CTRL_IRQ_RX_NEMPTY = 22 , UART_CTRL_IRQ_RX_HALF = 23 ,
  UART_CTRL_IRQ_RX_FULL = 24 , UART_CTRL_IRQ_TX_EMPTY = 25 , UART_CTRL_IRQ_TX_NHALF = 26 , UART_CTRL_RX_CLR = 28 ,
  UART_CTRL_TX_CLR = 29 , UART_CTRL_RX_OVER = 30 , UART_CTRL_TX_BUSY = 31
}
 
enum  NEORV32_UART_DATA_enum {
  UART_DATA_RTX_LSB = 0 , UART_DATA_RTX_MSB = 7 , UART_DATA_RX_FIFO_SIZE_LSB = 8 , UART_DATA_RX_FIFO_SIZE_MSB = 11 ,
  UART_DATA_TX_FIFO_SIZE_LSB = 12 , UART_DATA_TX_FIFO_SIZE_MSB = 15
}
 

Detailed Description

Universal asynchronous receiver/transmitter (UART0/UART1) HW driver header file.

See also
https://stnolting.github.io/neorv32/sw/files.html

Macro Definition Documentation

◆ NEORV32_UART0

#define NEORV32_UART0   ((neorv32_uart_t*) (NEORV32_UART0_BASE))

UART0 module hardware access (neorv32_uart_t)

◆ neorv32_uart0_available

#define neorv32_uart0_available ( )
Value:
#define NEORV32_UART0
Definition neorv32_uart.h:34
int neorv32_uart_available(neorv32_uart_t *UARTx)
Definition neorv32_uart.c:30

◆ neorv32_uart0_char_received

#define neorv32_uart0_char_received ( )
Value:
int neorv32_uart_char_received(neorv32_uart_t *UARTx)
Definition neorv32_uart.c:255

◆ neorv32_uart0_char_received_get

#define neorv32_uart0_char_received_get ( )
Value:
char neorv32_uart_char_received_get(neorv32_uart_t *UARTx)
Definition neorv32_uart.c:275

◆ neorv32_uart0_disable

#define neorv32_uart0_disable ( )
Value:
void neorv32_uart_disable(neorv32_uart_t *UARTx)
Definition neorv32_uart.c:147

◆ neorv32_uart0_enable

#define neorv32_uart0_enable ( )
Value:
void neorv32_uart_enable(neorv32_uart_t *UARTx)
Definition neorv32_uart.c:136

◆ neorv32_uart0_get_rx_fifo_depth

#define neorv32_uart0_get_rx_fifo_depth ( )
Value:
int neorv32_uart_get_rx_fifo_depth(neorv32_uart_t *UARTx)
Definition neorv32_uart.c:110

◆ neorv32_uart0_get_tx_fifo_depth

#define neorv32_uart0_get_tx_fifo_depth ( )
Value:
int neorv32_uart_get_tx_fifo_depth(neorv32_uart_t *UARTx)
Definition neorv32_uart.c:124

◆ neorv32_uart0_getc

#define neorv32_uart0_getc ( )
Value:
char neorv32_uart_getc(neorv32_uart_t *UARTx)
Definition neorv32_uart.c:236

◆ neorv32_uart0_printf

#define neorv32_uart0_printf ( ...)
Value:
void neorv32_uart_printf(neorv32_uart_t *UARTx, const char *format,...)
Definition neorv32_uart.c:386

◆ neorv32_uart0_putc

#define neorv32_uart0_putc ( c)
Value:
void neorv32_uart_putc(neorv32_uart_t *UARTx, char c)
Definition neorv32_uart.c:181

◆ neorv32_uart0_puts

#define neorv32_uart0_puts ( s)
Value:
void neorv32_uart_puts(neorv32_uart_t *UARTx, const char *s)
Definition neorv32_uart.c:289

◆ neorv32_uart0_rtscts_disable

#define neorv32_uart0_rtscts_disable ( )
Value:
void neorv32_uart_rtscts_disable(neorv32_uart_t *UARTx)
Definition neorv32_uart.c:169

◆ neorv32_uart0_rtscts_enable

#define neorv32_uart0_rtscts_enable ( )
Value:
void neorv32_uart_rtscts_enable(neorv32_uart_t *UARTx)
Definition neorv32_uart.c:158

◆ neorv32_uart0_rx_clear

#define neorv32_uart0_rx_clear ( )
Value:
void neorv32_uart_rx_clear(neorv32_uart_t *UARTx)
Definition neorv32_uart.c:194

◆ neorv32_uart0_scan

#define neorv32_uart0_scan ( buffer,
max_size,
echo )
Value:
neorv32_uart_scan(NEORV32_UART0, buffer, max_size, echo)
int neorv32_uart_scan(neorv32_uart_t *UARTx, char *buffer, int max_size, int echo)
Definition neorv32_uart.c:406

◆ neorv32_uart0_setup

#define neorv32_uart0_setup ( baudrate,
irq_mask )
Value:
neorv32_uart_setup(NEORV32_UART0, baudrate, irq_mask)
void neorv32_uart_setup(neorv32_uart_t *UARTx, uint32_t baudrate, uint32_t irq_mask)
Definition neorv32_uart.c:51

◆ neorv32_uart0_tx_busy

#define neorv32_uart0_tx_busy ( )
Value:
int neorv32_uart_tx_busy(neorv32_uart_t *UARTx)
Definition neorv32_uart.c:217

◆ neorv32_uart0_tx_clear

#define neorv32_uart0_tx_clear ( )
Value:
void neorv32_uart_tx_clear(neorv32_uart_t *UARTx)
Definition neorv32_uart.c:205

◆ NEORV32_UART1

#define NEORV32_UART1   ((neorv32_uart_t*) (NEORV32_UART1_BASE))

UART1 module hardware access (neorv32_uart_t)

◆ neorv32_uart1_available

#define neorv32_uart1_available ( )
Value:
#define NEORV32_UART1
Definition neorv32_uart.h:37

◆ neorv32_uart1_char_received

#define neorv32_uart1_char_received ( )

◆ neorv32_uart1_char_received_get

#define neorv32_uart1_char_received_get ( )

◆ neorv32_uart1_disable

#define neorv32_uart1_disable ( )

◆ neorv32_uart1_enable

#define neorv32_uart1_enable ( )

◆ neorv32_uart1_get_rx_fifo_depth

#define neorv32_uart1_get_rx_fifo_depth ( )

◆ neorv32_uart1_get_tx_fifo_depth

#define neorv32_uart1_get_tx_fifo_depth ( )

◆ neorv32_uart1_getc

#define neorv32_uart1_getc ( )

◆ neorv32_uart1_printf

#define neorv32_uart1_printf ( ...)
Value:

◆ neorv32_uart1_putc

#define neorv32_uart1_putc ( c)

◆ neorv32_uart1_puts

#define neorv32_uart1_puts ( s)

◆ neorv32_uart1_rtscts_disable

#define neorv32_uart1_rtscts_disable ( )

◆ neorv32_uart1_rtscts_enable

#define neorv32_uart1_rtscts_enable ( )

◆ neorv32_uart1_rx_clear

#define neorv32_uart1_rx_clear ( )

◆ neorv32_uart1_scan

#define neorv32_uart1_scan ( buffer,
max_size,
echo )
Value:
neorv32_uart_scan(NEORV32_UART1, buffer, max_size, echo)

◆ neorv32_uart1_setup

#define neorv32_uart1_setup ( baudrate,
irq_mask )
Value:
neorv32_uart_setup(NEORV32_UART1, baudrate, irq_mask)

◆ neorv32_uart1_tx_busy

#define neorv32_uart1_tx_busy ( )

◆ neorv32_uart1_tx_clear

#define neorv32_uart1_tx_clear ( )

Enumeration Type Documentation

◆ NEORV32_UART_CTRL_enum

UART control register bits

Enumerator
UART_CTRL_EN 

UART control register(0) (r/w): UART global enable

UART_CTRL_SIM_MODE 

UART control register(1) (r/w): Simulation output override enable

UART_CTRL_HWFC_EN 

UART control register(2) (r/w): Enable RTS/CTS hardware flow-control

UART_CTRL_PRSC0 

UART control register(3) (r/w): clock prescaler select bit 0

UART_CTRL_PRSC1 

UART control register(4) (r/w): clock prescaler select bit 1

UART_CTRL_PRSC2 

UART control register(5) (r/w): clock prescaler select bit 2

UART_CTRL_BAUD0 

UART control register(6) (r/w): BAUD rate divisor, bit 0

UART_CTRL_BAUD1 

UART control register(7) (r/w): BAUD rate divisor, bit 1

UART_CTRL_BAUD2 

UART control register(8) (r/w): BAUD rate divisor, bit 2

UART_CTRL_BAUD3 

UART control register(9) (r/w): BAUD rate divisor, bit 3

UART_CTRL_BAUD4 

UART control register(10) (r/w): BAUD rate divisor, bit 4

UART_CTRL_BAUD5 

UART control register(11) (r/w): BAUD rate divisor, bit 5

UART_CTRL_BAUD6 

UART control register(12) (r/w): BAUD rate divisor, bit 6

UART_CTRL_BAUD7 

UART control register(13) (r/w): BAUD rate divisor, bit 7

UART_CTRL_BAUD8 

UART control register(14) (r/w): BAUD rate divisor, bit 8

UART_CTRL_BAUD9 

UART control register(15) (r/w): BAUD rate divisor, bit 9

UART_CTRL_RX_NEMPTY 

UART control register(16) (r/-): RX FIFO not empty

UART_CTRL_RX_HALF 

UART control register(17) (r/-): RX FIFO at least half-full

UART_CTRL_RX_FULL 

UART control register(18) (r/-): RX FIFO full

UART_CTRL_TX_EMPTY 

UART control register(19) (r/-): TX FIFO empty

UART_CTRL_TX_NHALF 

UART control register(20) (r/-): TX FIFO not at least half-full

UART_CTRL_TX_FULL 

UART control register(21) (r/-): TX FIFO full

UART_CTRL_IRQ_RX_NEMPTY 

UART control register(22) (r/w): Fire IRQ if RX FIFO not empty

UART_CTRL_IRQ_RX_HALF 

UART control register(23) (r/w): Fire IRQ if RX FIFO at least half-full

UART_CTRL_IRQ_RX_FULL 

UART control register(24) (r/w): Fire IRQ if RX FIFO full

UART_CTRL_IRQ_TX_EMPTY 

UART control register(25) (r/w): Fire IRQ if TX FIFO empty

UART_CTRL_IRQ_TX_NHALF 

UART control register(26) (r/w): Fire IRQ if TX FIFO not at least half-full

UART_CTRL_RX_CLR 

UART control register(28) (r/w): Clear RX FIFO, flag auto-clears

UART_CTRL_TX_CLR 

UART control register(29) (r/w): Clear TX FIFO, flag auto-clears

UART_CTRL_RX_OVER 

UART control register(30) (r/-): RX FIFO overflow

UART_CTRL_TX_BUSY 

UART control register(31) (r/-): Transmitter busy or TX FIFO not empty

◆ NEORV32_UART_DATA_enum

UART data register bits

Enumerator
UART_DATA_RTX_LSB 

UART data register(0) (r/w): UART receive/transmit data, LSB

UART_DATA_RTX_MSB 

UART data register(7) (r/w): UART receive/transmit data, MSB

UART_DATA_RX_FIFO_SIZE_LSB 

UART data register(8) (r/-): log2(RX FIFO size), LSB

UART_DATA_RX_FIFO_SIZE_MSB 

UART data register(11) (r/-): log2(RX FIFO size), MSB

UART_DATA_TX_FIFO_SIZE_LSB 

UART data register(12) (r/-): log2(RX FIFO size), LSB

UART_DATA_TX_FIFO_SIZE_MSB 

UART data register(15) (r/-): log2(RX FIFO size), MSB

Function Documentation

◆ neorv32_uart_available()

int neorv32_uart_available ( neorv32_uart_t * UARTx)

Check if UART unit was synthesized.

Parameters
[in,out]Hardwarehandle to UART register struct, neorv32_uart_t.
Returns
0 if UART0/1 was not synthesized, 1 if UART0/1 is available.

◆ neorv32_uart_char_received()

int neorv32_uart_char_received ( neorv32_uart_t * UARTx)

Check if UART has received a char.

Note
This function is non-blocking.
Use neorv32_uart_char_received_get(void) to get the char.
Parameters
[in,out]UARTxHardware handle to UART register struct, neorv32_uart_t.
Returns
1 when a char has been received, 0 otherwise.

◆ neorv32_uart_char_received_get()

char neorv32_uart_char_received_get ( neorv32_uart_t * UARTx)

Get a received char from UART.

Note
This function is non-blocking.
Should only be used in combination with neorv32_uart_char_received(void).
Parameters
[in,out]UARTxHardware handle to UART register struct, neorv32_uart_t.
Returns
Received char.

◆ neorv32_uart_disable()

void neorv32_uart_disable ( neorv32_uart_t * UARTx)

Disable UART.

Parameters
[in,out]UARTxHardware handle to UART register struct, neorv32_uart_t.

◆ neorv32_uart_enable()

void neorv32_uart_enable ( neorv32_uart_t * UARTx)

Enable UART.

Parameters
[in,out]UARTxHardware handle to UART register struct, neorv32_uart_t.

◆ neorv32_uart_get_rx_fifo_depth()

int neorv32_uart_get_rx_fifo_depth ( neorv32_uart_t * UARTx)

Get UART RX FIFO depth.

Parameters
[in,out]UARTxHardware handle to UART register struct, neorv32_uart_t.
Returns
FIFO depth (number of entries)

◆ neorv32_uart_get_tx_fifo_depth()

int neorv32_uart_get_tx_fifo_depth ( neorv32_uart_t * UARTx)

Get UART TX FIFO depth.

Parameters
[in,out]UARTxHardware handle to UART register struct, neorv32_uart_t.
Returns
FIFO depth (number of entries)

◆ neorv32_uart_getc()

char neorv32_uart_getc ( neorv32_uart_t * UARTx)

Get char from UART.

Note
This function is blocking.
Parameters
[in,out]UARTxHardware handle to UART register struct, neorv32_uart_t.
Returns
Received char.

◆ neorv32_uart_printf()

void neorv32_uart_printf ( neorv32_uart_t * UARTx,
const char * format,
... )

Custom version of 'printf' printing to UART.

Warning
: This functions only provides a minimal subset of the 'printf' formating features!
Note
This function is blocking.
Parameters
[in,out]UARTxHardware handle to UART register struct, neorv32_uart_t.
[in]formatPointer to format string. See neorv32_uart_vprintf.

◆ neorv32_uart_putc()

void neorv32_uart_putc ( neorv32_uart_t * UARTx,
char c )

Send single char via UART.

Parameters
[in,out]UARTxHardware handle to UART register struct, neorv32_uart_t.
[in]cChar to be send.

◆ neorv32_uart_puts()

void neorv32_uart_puts ( neorv32_uart_t * UARTx,
const char * s )

Print string (zero-terminated) via UART. Print full line break "\r\n" for every '
'.

Note
This function is blocking.
Parameters
[in,out]UARTxHardware handle to UART register struct, neorv32_uart_t.
[in]sPointer to string.

◆ neorv32_uart_rtscts_disable()

void neorv32_uart_rtscts_disable ( neorv32_uart_t * UARTx)

Disable RTS/CTS hardware flow-control.

Parameters
[in,out]UARTxHardware handle to UART register struct, neorv32_uart_t.

◆ neorv32_uart_rtscts_enable()

void neorv32_uart_rtscts_enable ( neorv32_uart_t * UARTx)

Enable RTS/CTS hardware flow-control.

Parameters
[in,out]UARTxHardware handle to UART register struct, neorv32_uart_t.

◆ neorv32_uart_rx_clear()

void neorv32_uart_rx_clear ( neorv32_uart_t * UARTx)

Clear RX FIFO.

Parameters
[in,out]UARTxHardware handle to UART register struct, neorv32_uart_t.

◆ neorv32_uart_scan()

int neorv32_uart_scan ( neorv32_uart_t * UARTx,
char * buffer,
int max_size,
int echo )

Simplified custom version of 'scanf' reading from UART.

Note
This function is blocking.
Parameters
[in,out]UARTxHardware handle to UART register struct, neorv32_uart_t.
[in,out]bufferPointer to array of chars to store string.
[in]max_sizeMaximum number of chars to sample (including zero-termination).
[in]echoEcho UART input when 1.
Returns
Number of chars read.

◆ neorv32_uart_setup()

void neorv32_uart_setup ( neorv32_uart_t * UARTx,
uint32_t baudrate,
uint32_t irq_mask )

Reset, configure and enable UART.

Parameters
[in,out]UARTxHardware handle to UART register struct, neorv32_uart_t.
[in]baudrateTargeted BAUD rate (e.g. 19200).
[in]irq_maskInterrupt configuration mask (CTRL's irq_* bits).

◆ neorv32_uart_tx_busy()

int neorv32_uart_tx_busy ( neorv32_uart_t * UARTx)

Check if UART TX is busy (transmitter busy or data left in TX buffer).

Parameters
[in,out]UARTxHardware handle to UART register struct, neorv32_uart_t.
Returns
0 if idle, 1 if busy

◆ neorv32_uart_tx_clear()

void neorv32_uart_tx_clear ( neorv32_uart_t * UARTx)

Clear TX FIFO.

Parameters
[in,out]UARTxHardware handle to UART register struct, neorv32_uart_t.

◆ neorv32_uart_vprintf()

void neorv32_uart_vprintf ( neorv32_uart_t * UARTx,
const char * format,
va_list args )

Custom version of 'vprintf' printing to UART.

Warning
: This functions only provides a minimal subset of the 'vprintf' formating features!
Note
This function is blocking.
Parameters
[in,out]UARTxHardware handle to UART register struct, neorv32_uart_t.
[in]formatPointer to format string.
[in]argsA value identifying a variable arguments list.