NEORV32 - Software Framework Documentation
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Data Structures | Macros | Enumerations
neorv32_wdt.h File Reference

Watchdog Timer (WDT) HW driver header file. More...

Go to the source code of this file.

Data Structures

struct  neorv32_wdt_t
 

Macros

#define WDT_PASSWORD   (0x709D1AB3)
 

Enumerations

enum  NEORV32_WDT_RCAUSE_enum { WDT_RCAUSE_EXT = 0b00 , WDT_RCAUSE_OCD = 0b01 , WDT_RCAUSE_WDT = 0b10 }
 

Functions

Prototypes
int neorv32_wdt_available (void)
 
void neorv32_wdt_setup (uint32_t timeout, int lock, int debug_en, int sleep_en, int strict)
 
int neorv32_wdt_disable (void)
 
void neorv32_wdt_feed (void)
 
int neorv32_wdt_get_cause (void)
 

IO Device: Watchdog Timer (WDT)

#define NEORV32_WDT   ((neorv32_wdt_t*) (NEORV32_WDT_BASE))
 
enum  NEORV32_WDT_CTRL_enum {
  WDT_CTRL_EN = 0 , WDT_CTRL_LOCK = 1 , WDT_CTRL_DBEN = 2 , WDT_CTRL_SEN = 3 ,
  WDT_CTRL_STRICT = 4 , WDT_CTRL_RCAUSE_LO = 5 , WDT_CTRL_RCAUSE_HI = 6 , WDT_CTRL_TIMEOUT_LSB = 8 ,
  WDT_CTRL_TIMEOUT_MSB = 31
}
 

Detailed Description

Watchdog Timer (WDT) HW driver header file.

Note
These functions should only be used if the WDT unit was synthesized (IO_WDT_EN = true).

Macro Definition Documentation

◆ NEORV32_WDT

#define NEORV32_WDT   ((neorv32_wdt_t*) (NEORV32_WDT_BASE))

WDT module hardware access (neorv32_wdt_t)

◆ WDT_PASSWORD

#define WDT_PASSWORD   (0x709D1AB3)

Reset Password

Enumeration Type Documentation

◆ NEORV32_WDT_CTRL_enum

WDT control register bits

Enumerator
WDT_CTRL_EN 

WDT control register(0) (r/w): Watchdog enable

WDT_CTRL_LOCK 

WDT control register(1) (r/w): Lock write access to control register, clears on reset only

WDT_CTRL_DBEN 

WDT control register(2) (r/w): Allow WDT to continue operation even when CPU is in debug mode

WDT_CTRL_SEN 

WDT control register(3) (r/w): Allow WDT to continue operation even when CPU is in sleep mode

WDT_CTRL_STRICT 

WDT control register(4) (r/w): Force hardware reset if reset password is incorrect or if write attempt to locked CTRL register

WDT_CTRL_RCAUSE_LO 

WDT control register(5) (r/-): Cause of last system reset - low

WDT_CTRL_RCAUSE_HI 

WDT control register(5) (r/-): Cause of last system reset - high

WDT_CTRL_TIMEOUT_LSB 

WDT control register(8) (r/w): Timeout value, LSB

WDT_CTRL_TIMEOUT_MSB 

WDT control register(31) (r/w): Timeout value, MSB

◆ NEORV32_WDT_RCAUSE_enum

Reset Cause

Enumerator
WDT_RCAUSE_EXT 

Reset caused by external signal/pin

WDT_RCAUSE_OCD 

Reset caused by on-chip debugger

WDT_RCAUSE_WDT 

Reset caused by watchdog timer

Function Documentation

◆ neorv32_wdt_available()

int neorv32_wdt_available ( void )

Check if WDT unit was synthesized.

Returns
0 if WDT was not synthesized, 1 if WDT is available.

◆ neorv32_wdt_disable()

int neorv32_wdt_disable ( void )

Disable watchdog timer.

Returns
Returns 0 if WDT is really deactivated, -1 otherwise.

◆ neorv32_wdt_feed()

void neorv32_wdt_feed ( void )

Feed watchdog (reset timeout counter).

◆ neorv32_wdt_get_cause()

int neorv32_wdt_get_cause ( void )

Get cause of last system reset.

Returns
Cause of last reset (0: external reset, 1: OCD reset, 2: WDT reset).

◆ neorv32_wdt_setup()

void neorv32_wdt_setup ( uint32_t timeout,
int lock,
int debug_en,
int sleep_en,
int strict )

Configure and enable watchdog timer. The WDT control register bits are listed in NEORV32_WDT_CTRL_enum.

Warning
Once the lock bit is set it can only be removed by a hardware reset!
Parameters
[in]timeout24-bit timeout value. A WDT IRQ is triggered when the internal counter reaches 'timeout/2'. A system hardware reset is triggered when the internal counter reaches 'timeout'.
[in]lockControl register will be locked when 1 (until next reset).
[in]debug_enAllow watchdog to continue operation even when CPU is in debug mode.
[in]sleep_enAllow watchdog to continue operation even when CPU is in sleep mode.
[in]strictForce hardware reset if reset password is incorrect.