NEORV32 Software Framework Documentation
The NEORV32 RISC-V Processor
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Watchdog Timer (WDT) HW driver header file. More...
#include <stdint.h>
Go to the source code of this file.
Data Structures | |
struct | neorv32_wdt_t |
Macros | |
#define | WDT_PASSWORD (0x709D1AB3) |
Enumerations | |
enum | NEORV32_WDT_RCAUSE_enum { WDT_RCAUSE_EXT = 0b00 , WDT_RCAUSE_OCD = 0b01 , WDT_RCAUSE_TMO = 0b10 , WDT_RCAUSE_ACC = 0b11 } |
Functions | |
Prototypes | |
int | neorv32_wdt_available (void) |
void | neorv32_wdt_setup (uint32_t timeout, int lock, int debug_en, int sleep_en, int strict) |
int | neorv32_wdt_disable (void) |
void | neorv32_wdt_feed (uint32_t password) |
int | neorv32_wdt_get_cause (void) |
IO Device: Watchdog Timer (WDT) | |
#define | NEORV32_WDT ((neorv32_wdt_t*) (NEORV32_WDT_BASE)) |
enum | NEORV32_WDT_CTRL_enum { WDT_CTRL_EN = 0 , WDT_CTRL_LOCK = 1 , WDT_CTRL_DBEN = 2 , WDT_CTRL_SEN = 3 , WDT_CTRL_STRICT = 4 , WDT_CTRL_RCAUSE_LO = 5 , WDT_CTRL_RCAUSE_HI = 6 , WDT_CTRL_TIMEOUT_LSB = 8 , WDT_CTRL_TIMEOUT_MSB = 31 } |
Watchdog Timer (WDT) HW driver header file.
#define NEORV32_WDT ((neorv32_wdt_t*) (NEORV32_WDT_BASE)) |
WDT module hardware access (neorv32_wdt_t)
#define WDT_PASSWORD (0x709D1AB3) |
Reset Password
WDT control register bits
int neorv32_wdt_available | ( | void | ) |
Check if WDT unit was synthesized.
int neorv32_wdt_disable | ( | void | ) |
Disable watchdog timer.
void neorv32_wdt_feed | ( | uint32_t | password | ) |
Feed watchdog (reset timeout counter).
[in] | password | Password for WDT reset. |
int neorv32_wdt_get_cause | ( | void | ) |
Get cause of last system reset.
void neorv32_wdt_setup | ( | uint32_t | timeout, |
int | lock, | ||
int | debug_en, | ||
int | sleep_en, | ||
int | strict ) |
Configure and enable watchdog timer. The WDT control register bits are listed in NEORV32_WDT_CTRL_enum.
[in] | timeout | 24-bit timeout value. A WDT IRQ is triggered when the internal counter reaches 'timeout/2'. A system hardware reset is triggered when the internal counter reaches 'timeout'. |
[in] | lock | Control register will be locked when 1 (until next reset). |
[in] | debug_en | Allow watchdog to continue operation even when CPU is in debug mode. |
[in] | sleep_en | Allow watchdog to continue operation even when CPU is in sleep mode. |
[in] | strict | Force hardware reset if reset password is incorrect or if trying to alter a locked configuration. |