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NEORV32 - Software Framework Documentation
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Execute in place module (XIP) HW driver header file. More...
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Data Structures | |
struct | neorv32_xip_t |
Functions | |
Prototypes | |
int | neorv32_xip_available (void) |
int | neorv32_xip_setup (uint8_t prsc, uint8_t cpol, uint8_t cpha, uint8_t rd_cmd) |
int | neorv32_xip_start (uint8_t abytes, uint32_t page_base) |
void | neorv32_xip_highspeed_enable (void) |
void | neorv32_xip_highspeed_disable (void) |
void | neorv32_xip_burst_mode_enable (void) |
void | neorv32_xip_burst_mode_disable (void) |
int | neorv32_xip_spi_trans (uint8_t nbytes, uint64_t *rtx_data) |
IO Device: Execute In Place Module (XIP) | |
#define | NEORV32_XIP ((neorv32_xip_t*) (NEORV32_XIP_BASE)) |
enum | NEORV32_XIP_CTRL_enum { XIP_CTRL_EN = 0 , XIP_CTRL_PRSC0 = 1 , XIP_CTRL_PRSC1 = 2 , XIP_CTRL_PRSC2 = 3 , XIP_CTRL_CPOL = 4 , XIP_CTRL_CPHA = 5 , XIP_CTRL_SPI_NBYTES_LSB = 6 , XIP_CTRL_SPI_NBYTES_MSB = 9 , XIP_CTRL_XIP_EN = 10 , XIP_CTRL_XIP_ABYTES_LSB = 11 , XIP_CTRL_XIP_ABYTES_MSB = 12 , XIP_CTRL_RD_CMD_LSB = 13 , XIP_CTRL_RD_CMD_MSB = 20 , XIP_CTRL_PAGE_LSB = 21 , XIP_CTRL_PAGE_MSB = 24 , XIP_CTRL_SPI_CSEN = 25 , XIP_CTRL_HIGHSPEED = 26 , XIP_CTRL_BURST_EN = 27 , XIP_CTRL_PHY_BUSY = 30 , XIP_CTRL_XIP_BUSY = 31 } |
Execute in place module (XIP) HW driver header file.
#define NEORV32_XIP ((neorv32_xip_t*) (NEORV32_XIP_BASE)) |
XIP module hardware access (neorv32_xip_t)
XIP control/data register bits
int neorv32_xip_available | ( | void | ) |
Check if XIP module was synthesized.
void neorv32_xip_burst_mode_disable | ( | void | ) |
Disable XIP burst mode.
void neorv32_xip_burst_mode_enable | ( | void | ) |
Enable XIP burst mode (incremental reads).
void neorv32_xip_highspeed_disable | ( | void | ) |
Disable high-speed SPI mode.
void neorv32_xip_highspeed_enable | ( | void | ) |
Enable high-speed SPI mode (running at half of the processor clock).
int neorv32_xip_setup | ( | uint8_t | prsc, |
uint8_t | cpol, | ||
uint8_t | cpha, | ||
uint8_t | rd_cmd | ||
) |
Configure XIP module: configure SPI/flash properties.
[in] | prsc | SPI clock prescaler select (0..7). |
[in] | cpol | SPI clock polarity (0/1). |
[in] | cpha | SPI clock phase(0/1). |
[in] | rd_cmd | SPI flash read byte command. |
int neorv32_xip_spi_trans | ( | uint8_t | nbytes, |
uint64_t * | rtx_data | ||
) |
Direct SPI access to the XIP flash.
[in] | nbytes | Number of bytes to transfer (1..8). |
[in,out] | rtx_data | Pointer to 64-bit TX/RX data (MSB-aligned for sending, LSB-aligned for receiving (only 32-bit)). |
int neorv32_xip_start | ( | uint8_t | abytes, |
uint32_t | page_base | ||
) |
Enable XIP mode (to allow CPU to transparently fetch data & instructions).
[in] | abytes | Number of address bytes used to access the SPI flash (1,2,3,4). |
[in] | page_base | XIP memory page base address (top 4 address bits, 0..15). |