NEORV32 Software Framework Documentation
The NEORV32 RISC-V Processor
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SMP dual-core program to show how to use the RTE on two cores. This example runs the same code on both cores and triggers the timer and software interrupts to showcase dual-core trap handling using the NEORV32 runtime environment (RTE). More...
Macros | |
#define | BAUD_RATE 19200 |
Functions | |
void | trap_handler_mtmi (void) |
void | trap_handler_mswi (void) |
void | trap_handler_ecall (void) |
int | app_main (void) |
int | main (void) |
Variables | |
volatile uint8_t | core1_stack [2048] |
SMP dual-core program to show how to use the RTE on two cores. This example runs the same code on both cores and triggers the timer and software interrupts to showcase dual-core trap handling using the NEORV32 runtime environment (RTE).
#define BAUD_RATE 19200 |
User configuration
int app_main | ( | void | ) |
"Application code" executed by BOTH cores.
int main | ( | void | ) |
Main function for core 0 (primary core).
void trap_handler_ecall | ( | void | ) |
Machine environment call trap handler for BOTH cores.
void trap_handler_mswi | ( | void | ) |
Machine software (CLINT) interrupt handler for BOTH cores.
void trap_handler_mtmi | ( | void | ) |
Machine timer (CLINT) interrupt handler for BOTH cores.
volatile uint8_t core1_stack[2048] |
Global variables