NEORV32 Software Framework Documentation
The NEORV32 RISC-V Processor
Loading...
Searching...
No Matches
main.c File Reference

SMP dual-core program to show how to use the RTE on two cores. This example runs the same code on both cores and triggers the timer and software interrupts to showcase dual-core trap handling using the NEORV32 runtime environment (RTE). More...

#include <neorv32.h>
#include "spinlock.h"

Macros

#define BAUD_RATE   19200
 

Functions

void trap_handler_mtmi (void)
 
void trap_handler_mswi (void)
 
void trap_handler_ecall (void)
 
int app_main (void)
 
int main (void)
 

Variables

volatile uint8_t core1_stack [2048]
 

Detailed Description

SMP dual-core program to show how to use the RTE on two cores. This example runs the same code on both cores and triggers the timer and software interrupts to showcase dual-core trap handling using the NEORV32 runtime environment (RTE).

Macro Definition Documentation

◆ BAUD_RATE

#define BAUD_RATE   19200

User configuration

Function Documentation

◆ app_main()

int app_main ( void )

"Application code" executed by BOTH cores.

Returns
Irrelevant (but can be inspected by the debugger).

◆ main()

int main ( void )

Main function for core 0 (primary core).

Warning
This program requires the dual-core configuration, the CLINT, UART0 and the A/Zaamo ISA extension.
Returns
Irrelevant (but can be inspected by the debugger).

◆ trap_handler_ecall()

void trap_handler_ecall ( void )

Machine environment call trap handler for BOTH cores.

◆ trap_handler_mswi()

void trap_handler_mswi ( void )

Machine software (CLINT) interrupt handler for BOTH cores.

◆ trap_handler_mtmi()

void trap_handler_mtmi ( void )

Machine timer (CLINT) interrupt handler for BOTH cores.

Variable Documentation

◆ core1_stack

volatile uint8_t core1_stack[2048]

Global variables