API Reference
The NEORV32 RISC-V Processor
Loading...
Searching...
No Matches
Data Structures
neorv32_twd.h File Reference

Two-Wire Device Controller (TWD) HW driver header file. More...

#include <neorv32.h>
#include <stdint.h>

Go to the source code of this file.

Data Structures

struct  neorv32_twd_t
 

Functions

Prototypes
int neorv32_twd_available (void)
 
void neorv32_twd_setup (int device_addr, int fsel, uint32_t irq_mask)
 
void neorv32_twd_irq_config (int enable, uint32_t irq_mask)
 
int neorv32_twd_get_rx_fifo_depth (void)
 
int neorv32_twd_get_tx_fifo_depth (void)
 
void neorv32_twd_disable (void)
 
void neorv32_twd_enable (void)
 
void neorv32_twd_clear_rx (void)
 
void neorv32_twd_clear_tx (void)
 
int neorv32_twd_com_state (void)
 
int neorv32_twd_com_started (void)
 
int neorv32_twd_com_ended (void)
 
int neorv32_twd_rx_available (void)
 
int neorv32_twd_rx_full (void)
 
int neorv32_twd_tx_empty (void)
 
int neorv32_twd_tx_full (void)
 
void neorv32_twd_put (uint8_t data)
 
uint8_t neorv32_twd_get (void)
 

IO Device: Two-Wire Device Controller (TWD)

#define NEORV32_TWD   ((neorv32_twd_t*) (NEORV32_TWD_BASE))
 
enum  NEORV32_TWD_CTRL_enum {
  TWD_CTRL_EN = 0 , TWD_CTRL_CLR_RX = 1 , TWD_CTRL_CLR_TX = 2 , TWD_CTRL_FSEL = 3 ,
  TWD_CTRL_DEV_ADDR0 = 4 , TWD_CTRL_DEV_ADDR6 = 10 , TWD_CTRL_IRQ_RX_AVAIL = 11 , TWD_CTRL_IRQ_RX_FULL = 12 ,
  TWD_CTRL_IRQ_TX_EMPTY = 13 , TWD_CTRL_IRQ_TX_NFULL = 14 , TWD_CTRL_IRQ_COM_BEG = 15 , TWD_CTRL_IRQ_COM_END = 16 ,
  TWD_CTRL_RX_FIFO_LSB = 17 , TWD_CTRL_RX_FIFO_MSB = 20 , TWD_CTRL_TX_FIFO_LSB = 21 , TWD_CTRL_TX_FIFO_MSB = 24 ,
  TWD_CTRL_RX_AVAIL = 25 , TWD_CTRL_RX_FULL = 26 , TWD_CTRL_TX_EMPTY = 27 , TWD_CTRL_TX_FULL = 28 ,
  TWD_CTRL_COM_BEG = 29 , TWD_CTRL_COM_END = 30 , TWD_CTRL_COM = 31
}
 
enum  NEORV32_TWD_DATA_enum { TWD_DATA_LSB = 0 , TWD_DATA_MSB = 7 }
 

Detailed Description

Two-Wire Device Controller (TWD) HW driver header file.

Macro Definition Documentation

◆ NEORV32_TWD

#define NEORV32_TWD   ((neorv32_twd_t*) (NEORV32_TWD_BASE))

TWD module hardware handle (neorv32_twd_t)

Enumeration Type Documentation

◆ NEORV32_TWD_CTRL_enum

enum NEORV32_TWD_CTRL_enum

TWD control register bits

Enumerator
TWD_CTRL_EN 

TWD control register(0) (r/w): TWD enable

TWD_CTRL_CLR_RX 

TWD control register(1) (-/w): Clear RX FIFO, flag auto-clears

TWD_CTRL_CLR_TX 

TWD control register(2) (-/w): Clear TX FIFO, flag auto-clears

TWD_CTRL_FSEL 

TWD control register(3) (r/w): Bus sample clock / filter select

TWD_CTRL_DEV_ADDR0 

TWD control register(4) (r/w): Device address (7-bit), LSB

TWD_CTRL_DEV_ADDR6 

TWD control register(10) (r/w): Device address (7-bit), MSB

TWD_CTRL_IRQ_RX_AVAIL 

TWD control register(11) (r/w): IRQ if RX FIFO data available

TWD_CTRL_IRQ_RX_FULL 

TWD control register(12) (r/w): IRQ if RX FIFO full

TWD_CTRL_IRQ_TX_EMPTY 

TWD control register(13) (r/w): IRQ if TX FIFO empty

TWD_CTRL_IRQ_TX_NFULL 

TWD control register(14) (r/w): IRQ if TX FIFO not full

TWD_CTRL_IRQ_COM_BEG 

TWD control register(15) (r/w): IRQ if begin of communication

TWD_CTRL_IRQ_COM_END 

TWD control register(16) (r/w): IRQ if end of communication

TWD_CTRL_RX_FIFO_LSB 

TWD control register(17) (r/-): log2(RX_FIFO size), LSB

TWD_CTRL_RX_FIFO_MSB 

TWD control register(20) (r/-): log2(RX_FIFO size), MSB

TWD_CTRL_TX_FIFO_LSB 

TWD control register(21) (r/-): log2(TX_FIFO size), LSB

TWD_CTRL_TX_FIFO_MSB 

TWD control register(24) (r/-): log2(TX_FIFO size), MSB

TWD_CTRL_RX_AVAIL 

TWD control register(25) (r/-): RX FIFO data available

TWD_CTRL_RX_FULL 

TWD control register(26) (r/-): RX FIFO full

TWD_CTRL_TX_EMPTY 

TWD control register(27) (r/-): TX FIFO empty

TWD_CTRL_TX_FULL 

TWD control register(28) (r/-): TX FIFO full

TWD_CTRL_COM_BEG 

TWD control register(29) (r/c): communication has started; clear by writing 1

TWD_CTRL_COM_END 

TWD control register(30) (r/c): communication has ended; clear by writing 1

TWD_CTRL_COM 

TWD control register(31) (r/-): active communication

◆ NEORV32_TWD_DATA_enum

enum NEORV32_TWD_DATA_enum

TWD data register bits

Enumerator
TWD_DATA_LSB 

TWD data register(0) (r/w): Receive/transmit data (8-bit) LSB

TWD_DATA_MSB 

TWD data register(7) (r/w): Receive/transmit data (8-bit) MSB

Function Documentation

◆ neorv32_twd_available()

int neorv32_twd_available ( void )

Check if TWD unit was synthesized.

Returns
zero if TWD was not synthesized, non-zero if TWD is available.

◆ neorv32_twd_clear_rx()

void neorv32_twd_clear_rx ( void )

Clear TWD RX FIFO.

◆ neorv32_twd_clear_tx()

void neorv32_twd_clear_tx ( void )

Clear TWD TX FIFO.

◆ neorv32_twd_com_ended()

int neorv32_twd_com_ended ( void )

Check if the TWD communication has ended. This function also clears the "communication ended" flag it it was set.

Returns
Non-zero if a communication-end has been observed, zero otherwise.

◆ neorv32_twd_com_started()

int neorv32_twd_com_started ( void )

Check if the TWD communication has started. This function also clears the "communication started" flag it it was set.

Returns
Non-zero if a communication-start has been observed, zero otherwise.

◆ neorv32_twd_com_state()

int neorv32_twd_com_state ( void )

Check if a TWD communication is active.

Returns
zero if no communication, non-zero if active communication.

◆ neorv32_twd_disable()

void neorv32_twd_disable ( void )

Disable TWD controller.

◆ neorv32_twd_enable()

void neorv32_twd_enable ( void )

Enable TWD controller.

◆ neorv32_twd_get()

uint8_t neorv32_twd_get ( void )

Get data byte from RX FIFO.

Warning
This function is non-blocking. Check FIFO status before.
Returns
Data byte read from RX FIFO.

◆ neorv32_twd_get_rx_fifo_depth()

int neorv32_twd_get_rx_fifo_depth ( void )

Get TWD RX FIFO depth.

Returns
RX FIFO depth (number of entries), zero if no RX FIFO implemented

◆ neorv32_twd_get_tx_fifo_depth()

int neorv32_twd_get_tx_fifo_depth ( void )

Get TWD TX FIFO depth.

Returns
TX FIFO depth (number of entries), zero if no TX FIFO implemented

◆ neorv32_twd_irq_config()

void neorv32_twd_irq_config ( int enable,
uint32_t irq_mask )

Enable/disable IRQ TWD source(s).

Parameters
[in]enableEnable IRQ source(s) when non-zero, disable when zero.
[in]irq_maskInterrupt configuration bit mask (TWD_CTRL_IRQ_* bits).

◆ neorv32_twd_put()

void neorv32_twd_put ( uint8_t data)

Put data byte into TX FIFO.

Warning
This function is non-blocking. Check FIFO status before.
Parameters
[in]dataData byte to be stored in TX FIFO.

◆ neorv32_twd_rx_available()

int neorv32_twd_rx_available ( void )

Check if RX data available.

Returns
zero if no data available, non-zero if data is available.

◆ neorv32_twd_rx_full()

int neorv32_twd_rx_full ( void )

Check if RX FIFO is full.

Returns
zero if no RX FIFO is not full, non-zero if RX FIFO is full.

◆ neorv32_twd_setup()

void neorv32_twd_setup ( int device_addr,
int fsel,
uint32_t irq_mask )

Enable and configure TWD controller. The TWD control register bits are listed in NEORV32_TWD_CTRL_enum.

Parameters
[in]device_addr7-bit device address.
[in]fselBus sample clock / filter select.
[in]irq_maskInterrupt configuration bit mask (TWD_CTRL_IRQ_* bits).

◆ neorv32_twd_tx_empty()

int neorv32_twd_tx_empty ( void )

Check if TX FIFO is empty.

Returns
zero if no TX FIFO is not empty, non-zero if TX FIFO is empty.

◆ neorv32_twd_tx_full()

int neorv32_twd_tx_full ( void )

Check if TX FIFO is full.

Returns
zero if no TX FIFO is not full, non-zero if TX FIFO is full.
Generated by doxygen 1.12.0