neorv32_twd.h

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// ================================================================================ //
// The NEORV32 RISC-V Processor - https://github.com/stnolting/neorv32              //
// Copyright (c) NEORV32 contributors.                                              //
// Copyright (c) 2020 - 2025 Stephan Nolting. All rights reserved.                  //
// Licensed under the BSD-3-Clause license, see LICENSE for details.                //
// SPDX-License-Identifier: BSD-3-Clause                                            //
// ================================================================================ //

 
#ifndef NEORV32_TWD_H
#define NEORV32_TWD_H
 
#include <stdint.h>
 
 
/**********************************************************************/
typedef volatile struct __attribute__((packed,aligned(4))) {
  uint32_t CTRL; 
  uint32_t DATA; 
} neorv32_twd_t;

#define NEORV32_TWD ((neorv32_twd_t*) (NEORV32_TWD_BASE))

enum NEORV32_TWD_CTRL_enum {
  TWD_CTRL_EN           =  0, 
  TWD_CTRL_CLR_RX       =  1, 
  TWD_CTRL_CLR_TX       =  2, 
  TWD_CTRL_FSEL         =  3, 
  TWD_CTRL_DEV_ADDR0    =  4, 
  TWD_CTRL_DEV_ADDR6    = 10, 
  TWD_CTRL_IRQ_RX_AVAIL = 11, 
  TWD_CTRL_IRQ_RX_FULL  = 12, 
  TWD_CTRL_IRQ_TX_EMPTY = 13, 
  TWD_CTRL_TX_DUMMY_EN  = 14, 
  TWD_CTRL_HIDE_READ    = 15, 
  TWD_CTRL_RX_FIFO_LSB  = 16, 
  TWD_CTRL_RX_FIFO_MSB  = 19, 
  TWD_CTRL_TX_FIFO_LSB  = 20, 
  TWD_CTRL_TX_FIFO_MSB  = 23, 
 
  TWD_CTRL_RX_AVAIL     = 25, 
  TWD_CTRL_RX_FULL      = 26, 
  TWD_CTRL_TX_EMPTY     = 27, 
  TWD_CTRL_TX_FULL      = 28, 
  TWD_CTRL_SENSE_SCL    = 29, 
  TWD_CTRL_SENSE_SDA    = 30, 
  TWD_CTRL_BUSY         = 31  
};

enum NEORV32_TWD_DATA_enum {
  TWD_DATA_LSB = 0, 
  TWD_DATA_MSB = 7  
};

 
 
/**********************************************************************/
int     neorv32_twd_available(void);
void    neorv32_twd_setup(int device_addr, int fsel, int irq_rx_avail, int irq_rx_full, int irq_tx_empty, int tx_dummy_en, int hide_read);
int     neorv32_twd_get_rx_fifo_depth(void);
int     neorv32_twd_get_tx_fifo_depth(void);
void    neorv32_twd_disable(void);
void    neorv32_twd_enable(void);
void    neorv32_twd_disable_tx_dummy(void);
void    neorv32_twd_enable_tx_dummy(void);
void    neorv32_twd_clear_rx(void);
void    neorv32_twd_clear_tx(void);
int     neorv32_twd_sense_scl(void);
int     neorv32_twd_sense_sda(void);
int     neorv32_twd_busy(void);
int     neorv32_twd_rx_available(void);
int     neorv32_twd_rx_full(void);
int     neorv32_twd_tx_empty(void);
int     neorv32_twd_tx_full(void);
void    neorv32_twd_put(uint8_t data);
uint8_t neorv32_twd_get(void);
void    neorv32_twd_set_tx_dummy(uint8_t data);
 
 
#endif // NEORV32_TWD_H