NEORV32 Software Framework Documentation
The NEORV32 RISC-V Processor
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neorv32_dma_t Struct Reference

#include <neorv32_dma.h>

Data Fields

uint32_t CTRL
 
uint32_t SRC_BASE
 
uint32_t DST_BASE
 
uint32_t TTYPE
 

Detailed Description

DMA module prototype

Field Documentation

◆ CTRL

uint32_t neorv32_dma_t::CTRL

offset 0: control and status register (NEORV32_DMA_CTRL_enum)

◆ DST_BASE

uint32_t neorv32_dma_t::DST_BASE

offset 8: destination base address register

◆ SRC_BASE

uint32_t neorv32_dma_t::SRC_BASE

offset 4: source base address register

◆ TTYPE

uint32_t neorv32_dma_t::TTYPE

offset 12: transfer type configuration register & manual trigger (NEORV32_DMA_TTYPE_enum)


The documentation for this struct was generated from the following file: