neorv32_dma.h

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// ================================================================================ //
// The NEORV32 RISC-V Processor - https://github.com/stnolting/neorv32              //
// Copyright (c) NEORV32 contributors.                                              //
// Copyright (c) 2020 - 2025 Stephan Nolting. All rights reserved.                  //
// Licensed under the BSD-3-Clause license, see LICENSE for details.                //
// SPDX-License-Identifier: BSD-3-Clause                                            //
// ================================================================================ //

 
#ifndef NEORV32_DMA_H
#define NEORV32_DMA_H
 
#include <stdint.h>
 
 
/**********************************************************************/
typedef volatile struct __attribute__((packed,aligned(4))) {
  uint32_t CTRL; 
  uint32_t DESC; 
} neorv32_dma_t;

#define NEORV32_DMA ((neorv32_dma_t*) (NEORV32_DMA_BASE))

enum NEORV32_DMA_CTRL_enum {
  DMA_CTRL_EN        =  0, 
  DMA_CTRL_START     =  1, 
 
  DMA_CTRL_DFIFO_LSB = 16, 
  DMA_CTRL_DFIFO_MSB = 19, 
 
  CMA_CTRL_ACK       = 26, 
  DMA_CTRL_DEMPTY    = 27, 
  DMA_CTRL_DFULL     = 28, 
  DMA_CTRL_ERROR     = 29, 
  DMA_CTRL_DONE      = 30, 
  DMA_CTRL_BUSY      = 31  
};

enum NEORV32_DMA_CONF_enum {
  DMA_CONF_NUM_LSB =  0, 
  DMA_CONF_NUM_MSB = 23, 
 
  DMA_CONF_BSWAP   = 27, 
  DMA_CONF_SRC_LSB = 28, 
  DMA_CONF_SRC_MSB = 29, 
  DMA_CONF_DST_LSB = 30, 
  DMA_CONF_DST_MSB = 31  
};

 
 
/**********************************************************************/
enum NEORV32_DMA_TYPE_enum {
  DMA_TYPE_CONST_BYTE = 0b00, 
  DMA_TYPE_CONST_WORD = 0b01, 
  DMA_TYPE_INC_BYTE   = 0b10, 
  DMA_TYPE_INC_WORD   = 0b11  
};

#define DMA_SRC_CONST_BYTE (DMA_TYPE_CONST_BYTE << DMA_CONF_SRC_LSB)
#define DMA_SRC_CONST_WORD (DMA_TYPE_CONST_WORD << DMA_CONF_SRC_LSB)
#define DMA_SRC_INC_BYTE   (DMA_TYPE_INC_BYTE   << DMA_CONF_SRC_LSB)
#define DMA_SRC_INC_WORD   (DMA_TYPE_INC_WORD   << DMA_CONF_SRC_LSB)
#define DMA_DST_CONST_BYTE (DMA_TYPE_CONST_BYTE << DMA_CONF_DST_LSB)
#define DMA_DST_CONST_WORD (DMA_TYPE_CONST_WORD << DMA_CONF_DST_LSB)
#define DMA_DST_INC_BYTE   (DMA_TYPE_INC_BYTE   << DMA_CONF_DST_LSB)
#define DMA_DST_INC_WORD   (DMA_TYPE_INC_WORD   << DMA_CONF_DST_LSB)
#define DMA_BSWAP (1 << DMA_CONF_BSWAP)
 
 
/**********************************************************************/
enum NEORV32_DMA_STATUS_enum {
  DMA_STATUS_ERROR = -1, 
  DMA_STATUS_IDLE  =  0, 
  DMA_STATUS_BUSY  =  1, 
  DMA_STATUS_DONE  =  2  
};
 
 
/**********************************************************************/
int  neorv32_dma_available(void);
int  neorv32_dma_get_descriptor_fifo_depth(void);
int  neorv32_dma_descriptor_fifo_full(void);
int  neorv32_dma_descriptor_fifo_empty(void);
void neorv32_dma_enable(void);
void neorv32_dma_disable(void);
void neorv32_dma_irq_ack(void);
int  neorv32_dma_program(uint32_t src_addr, uint32_t dst_addr, uint32_t config);
void neorv32_dma_program_nocheck(uint32_t src_addr, uint32_t dst_addr, uint32_t config);
void neorv32_dma_start(void);
int  neorv32_dma_status(void);
 
 
#endif // NEORV32_DMA_H