Serial peripheral interface controller (SPI) HW driver source file.
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Serial peripheral interface controller (SPI) HW driver source file.
- Note
- These functions should only be used if the SPI unit was synthesized (IO_SPI_EN = true).
- See also
- https://stnolting.github.io/neorv32/sw/files.html
◆ neorv32_spi_available()
int neorv32_spi_available |
( |
void | | ) |
|
Check if SPI unit was synthesized.
- Returns
- 0 if SPI was not synthesized, 1 if SPI is available.
◆ neorv32_spi_busy()
int neorv32_spi_busy |
( |
void | | ) |
|
Check if SPI transceiver is busy or TX FIFO not empty.
- Returns
- 0 if idle, 1 if busy
◆ neorv32_spi_check_cs()
int neorv32_spi_check_cs |
( |
void | | ) |
|
Check if any chip-select line is active.
- Returns
- 0 if no CS lines are active, 1 if at least one CS line is active.
◆ neorv32_spi_cs_dis()
void neorv32_spi_cs_dis |
( |
void | | ) |
|
Deactivate currently active SPI chip select signal.
- Note
- The SPI chip select output lines are HIGH when deactivated.
-
This function is blocking.
◆ neorv32_spi_cs_dis_nonblocking()
void neorv32_spi_cs_dis_nonblocking |
( |
void | | ) |
|
Deactivate currently active SPI chip select signal (non-blocking).
- Note
- The SPI chip select output lines are HIGH when deactivated.
◆ neorv32_spi_cs_en()
void neorv32_spi_cs_en |
( |
int | cs | ) |
|
Activate single SPI chip select signal.
- Note
- The SPI chip select output lines are LOW when activated.
-
This function is blocking.
- Parameters
-
cs | Chip select line to activate (0..7). |
◆ neorv32_spi_cs_en_nonblocking()
void neorv32_spi_cs_en_nonblocking |
( |
int | cs | ) |
|
Activate single SPI chip select signal (non-blocking).
- Note
- The SPI chip select output lines are LOW when activated.
- Parameters
-
cs | Chip select line to activate (0..7). |
◆ neorv32_spi_disable()
void neorv32_spi_disable |
( |
void | | ) |
|
◆ neorv32_spi_enable()
void neorv32_spi_enable |
( |
void | | ) |
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◆ neorv32_spi_get_clock_speed()
uint32_t neorv32_spi_get_clock_speed |
( |
void | | ) |
|
Get configured clock speed in Hz.
- Returns
- Actual configured SPI clock speed in Hz.
◆ neorv32_spi_get_fifo_depth()
int neorv32_spi_get_fifo_depth |
( |
void | | ) |
|
Get SPI FIFO depth.
- Returns
- FIFO depth (number of entries), zero if no FIFO implemented
◆ neorv32_spi_get_nonblocking()
uint8_t neorv32_spi_get_nonblocking |
( |
void | | ) |
|
Get SPI RX data (non-blocking).
- Returns
- Receive data (8-bit, LSB-aligned).
◆ neorv32_spi_highspeed_disable()
void neorv32_spi_highspeed_disable |
( |
void | | ) |
|
◆ neorv32_spi_highspeed_enable()
void neorv32_spi_highspeed_enable |
( |
void | | ) |
|
◆ neorv32_spi_put_nonblocking()
void neorv32_spi_put_nonblocking |
( |
uint8_t | tx_data | ) |
|
Put SPI TX data (non-blocking).
- Parameters
-
tx_data | Transmit data (8-bit, LSB-aligned). |
◆ neorv32_spi_setup()
void neorv32_spi_setup |
( |
int | prsc, |
|
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int | cdiv, |
|
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int | clk_phase, |
|
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int | clk_polarity, |
|
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uint32_t | irq_mask ) |
Enable and configure SPI controller. The SPI control register bits are listed in NEORV32_SPI_CTRL_enum.
- Parameters
-
[in] | prsc | Clock prescaler select (0..7). See NEORV32_CLOCK_PRSC_enum. @prama[in] cdiv Clock divider (0..15). |
[in] | clk_phase | Clock phase (0=sample on rising edge, 1=sample on falling edge). |
[in] | clk_polarity | Clock polarity (when idle). |
[in] | irq_mask | Interrupt configuration mask (CTRL's irq_* bits). |
◆ neorv32_spi_trans()
uint8_t neorv32_spi_trans |
( |
uint8_t | tx_data | ) |
|
Perform a single SPI data transfer.
- Note
- This function is blocking.
- Parameters
-
tx_data | Transmit data (8-bit, LSB-aligned). |
- Returns
- Receive data (8-bit, LSB-aligned).