NEORV32 - Software Framework Documentation
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Functions
neorv32_spi.c File Reference

Serial peripheral interface controller (SPI) HW driver source file. More...

#include "neorv32.h"
#include "neorv32_spi.h"

Functions

int neorv32_spi_available (void)
 
void neorv32_spi_setup (int prsc, int cdiv, int clk_phase, int clk_polarity, int data_size, int irq_config)
 
uint32_t neorv32_spi_get_clock_speed (void)
 
void neorv32_spi_disable (void)
 
void neorv32_spi_enable (void)
 
int neorv32_spi_get_fifo_depth (void)
 
void neorv32_spi_cs_en (int cs)
 
void neorv32_spi_cs_dis (void)
 
uint32_t neorv32_spi_trans (uint32_t tx_data)
 
void neorv32_spi_put_nonblocking (uint32_t tx_data)
 
uint32_t neorv32_spi_get_nonblocking (void)
 
int neorv32_spi_busy (void)
 

Detailed Description

Serial peripheral interface controller (SPI) HW driver source file.

Note
These functions should only be used if the SPI unit was synthesized (IO_SPI_EN = true).

Function Documentation

◆ neorv32_spi_available()

int neorv32_spi_available ( void  )

Check if SPI unit was synthesized.

Returns
0 if SPI was not synthesized, 1 if SPI is available.

◆ neorv32_spi_busy()

int neorv32_spi_busy ( void  )

Check if SPI transceiver is busy.

Returns
0 if idle, 1 if busy

◆ neorv32_spi_cs_dis()

void neorv32_spi_cs_dis ( void  )

Deactivate currently active SPI chip select signal.

Note
The SPI chip select output lines are HIGH when deactivated.

◆ neorv32_spi_cs_en()

void neorv32_spi_cs_en ( int  cs)

Activate single SPI chip select signal.

Note
The SPI chip select output lines are LOW when activated.
Parameters
csChip select line to activate (0..7).

◆ neorv32_spi_disable()

void neorv32_spi_disable ( void  )

Disable SPI controller.

◆ neorv32_spi_enable()

void neorv32_spi_enable ( void  )

Enable SPI controller.

◆ neorv32_spi_get_clock_speed()

uint32_t neorv32_spi_get_clock_speed ( void  )

Get configured clock speed in Hz.

Returns
Actual configured SPI clock speed in Hz.

◆ neorv32_spi_get_fifo_depth()

int neorv32_spi_get_fifo_depth ( void  )

Get SPI FIFO depth.

Returns
FIFO depth (number of entries), zero if no FIFO implemented

◆ neorv32_spi_get_nonblocking()

uint32_t neorv32_spi_get_nonblocking ( void  )

Get SPI RX data (non-blocking).

Returns
Receive data (8/16/24/32-bit, LSB-aligned).

◆ neorv32_spi_put_nonblocking()

void neorv32_spi_put_nonblocking ( uint32_t  tx_data)

Initiate SPI TX transfer (non-blocking).

Parameters
tx_dataTransmit data (8/16/24/32-bit, LSB-aligned).

◆ neorv32_spi_setup()

void neorv32_spi_setup ( int  prsc,
int  cdiv,
int  clk_phase,
int  clk_polarity,
int  data_size,
int  irq_config 
)

Enable and configure SPI controller. The SPI control register bits are listed in NEORV32_SPI_CTRL_enum.

Parameters
[in]prscClock prescaler select (0..7). See NEORV32_CLOCK_PRSC_enum. @prama[in] cdiv Clock divider (0..15).
[in]clk_phaseClock phase (0=sample on rising edge, 1=sample on falling edge).
[in]clk_polarityClock polarity (when idle).
[in]data_sizeData transfer size (0: 8-bit, 1: 16-bit, 2: 24-bit, 3: 32-bit).
[in]irq_configInterrupt configuration (0,1: PHY transfer done, 2: TX FIFO becomes less than half full, 3: TX FIFO becomes empty).

◆ neorv32_spi_trans()

uint32_t neorv32_spi_trans ( uint32_t  tx_data)

Initiate SPI transfer.

Note
This function is blocking.
Parameters
tx_dataTransmit data (8/16/24/32-bit, LSB-aligned).
Returns
Receive data (8/16/24/32-bit, LSB-aligned).